工作內容： 1.智慧網卡功能及協定之研究 2.制訂智慧網卡產品設計規格 3.IC系統驗證工具開發 4.IC功能Firmware開發 5.FPGA & IC 系統驗證及除錯 6.專案相關報告撰寫 應徵條件： 1.碩士以上電子電機、資訊、通訊工程等相關科技者佳 2.PCIe 相關實作與開發經驗佳 3.熟悉Ethernet 802.3規格佳 4.Ethernet Switch 相關實作與開發經驗佳 5.Linux networking相關實作經驗佳 6.具嵌入式系統開發經驗佳 7.熟悉C語言

Job Overview: BT/BLE FAE should be able to code and debug; support customers technically & coordinate technical support with engineering team in HQ. This role would require travelling on-site to the customer’s office, lab, production floor & factory. You may also be required to attend & facilitate training sessions, & exhibitions. The job would require extraordinary communication skills to be able to understand and communicate with non-English native speakers. Responsibilities: 1.Develop firmware for Bluetooth SoC. 2.Provide technical support to customers. Qualifications: 1.Master’s degree or above in a relevant field. 2.Strong system design skills. 3.Proficiency in C/C++ programming. 4.Solid understanding of hardware platforms, including circuit design and hardware specifications. 5.Effective communication skills and team-oriented mindset. 6.Enthusiasm for tackling new technological challenges.

Responsibilities: 1.Work closely with system developers in India to develop WiFi products. 2.Troubleshoot technical issues during the development and manufacturing stages. 3.Diagnose and resolve WiFi issues in broadband products, including xPON or AP routers, in collaboration with Realtek HQ R&D. Qualifications: 1.Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or related field, or equivalent experience. 2.Skilled in C programming and shell scripting. 3.Experience with networking feature development, such as Firewall, DHCP, DNS, VPN, PPPoE, and NAT. 4.Familiarity with the WireShark tool. 5.Background in WiFi technology and experience in WiFi product development are a plus.

Job Overview: 1.xPON / Switch FAE is required to be able to code, compile, collect & analyze logs and debug; support customers technically & coordinate technical support with engineering team in HQ. 2.This role would require travelling on-site to customer‘s office, lab, production floor & factory (Mumbai, Delhi NCR etc.). You would also be required to attend and facilitate training sessions, & exhibitions. 3.The job would require extraordinary communication skills to be able to understand and communicate with non-English native speakers. Responsibilities: 1.Co-work with Indian system developers to develop an xPON products [GPON/EPON/XGS-PON/ N-GPON]. 2.Troubleshooting issues during the development and manufacturing stage for the customers. 3.Provide the guide to customer for develop features in Linux kernel driver or system level features (e.g. LED/GPIO control, DHCP, IP-tables module, WEB) on the GPON ONU. 4.Be able to work on and resolve issues in many diverse areas of the system (From low-level kernel mechanisms to high-level application features and co-work with Realtek HQ RD) Qualifications: 1.MS/BA/BS in Computer Science, Computer Engineering, Electrical Engineering, or related field, or equivalent experience. 2.Proficient in C, shell scripting, and router web design. 3.Knowledge of L2/L3/xPON networking protocols and features such as Firewall, DHCP, DNS, VPN, PPPoE, QoS, and HWNAT engine. 4.Experience working with Linux systems. 5.Preferred skills include:u-boot, flash partition, file system, Makefile, build systems. 6.Debugging and development/testing experience with interfaces like MDIO, RGMII/SGMII/QSGMII, DDR, UART, I2C, GPIO, and FLASH. 7.Familiarity with Realtek GPON chip development.

工作項目： 1. SoC Bus Acrchitecture planning 2. DDR controller efficiency analysis 3. System bandwidth estimation/analysis and profiling 4. SoC performance emulation. 應徵條件： 1. 碩士以上;電機工程、電信工程、電控工程、電子工程、資訊工程、資訊科學、動力機械、自動控制、通訊工程等相關科系畢業者 2. 熟悉 Verilog 3. 具3年以上下列相關經驗者佳： (1) 熟悉 SoC bus architecture (2) 熟悉 DDR protocol 以及utilization improvement (3) 有系統效能分析與 memory bandwidth 的經驗 (4) 具有 Zebu或類似之 emulator 整合與驗證經驗

工作項目： 1. 負責技術文件管制中心(TDCC)管理事務： A. 建立及維護技術文件管理制度。 B. 建立及維護各技術文件範本和清單。 C. 負責技術文件的管制、審查和發佈流程及相關系統之整合改善。 D. 審查發佈給客戶的技術文件，例如 datasheet、application note、user guide、user manual...。 2. 持續取得客戶回饋資訊，負責統籌技術文件品質的持續改善專案。 徵才條件： 1. 英文聽說讀寫精通，具TOEIC金色證書 2. 具技術文件撰寫及管理經驗，有IC國際大廠經驗尤佳 3. 文書作業細心且要求正確性 4. 能夠學習並表達IC技術 5. 須能團隊合作，並擅長跨部門溝通互動

工作項目： - Work with Corporate Data Research Center and Multimedia Business Units on data management and pricing/demand planning model optimization. - Work with the Business Unit product managers on pricing management and demand planning. - Follow through pricing and demand planning performance, collect feedback from the market PMs, and AMs, and propose strategy improvement. 應徵條件： - Master’s degree in Business, Finance, Economics, Engineering, or a related field. - 5+ years of experience with a semiconductor product company, with in-depth knowledge of products, market positioning, and customer behavior. - 2+ years of experience in planning, operations, or data analytics. - Familiarity with factors influencing market or operations. - Proven ability to work with analytics tools or teams to support decision-making. - Proficient in analyzing market trends and understanding their implication for business. - Strong understanding of market dynamics, trends, competitive landscapes, and customer needs. Hands-on experience in a frontline role is preferred. - Proven ability to engage in or lead cross-functional projects and influence decision-making. - Exceptional interpersonal and communication skills to effectively align teams and present pricing decisions to stakeholders.

工作項目： 1. 財務帳務處理：負責日常會計作業，包括費用審核、帳務處理與財務報表編製 2. 稅務申報：處理營業稅、營所稅、各類所得等相關稅務申報，確保依法合規 3. 銀行帳戶管理：管理資金配置，確保資金投資效率 4. 熟悉Excel分析報表製作，擅長資料處理及分析作業 5. 其他主管交辦事項 應徵條件： 1. 學歷要求：會計、財務、經濟或相關科系學士以上學歷 2.工作經驗：至少3年以上會計或財務相關工作經驗，有事務所或企業財務部門經驗者優先 3.專業能力：熟悉會計準則、財務報表編製及稅務申報流程 4.軟體技能：熟悉Excel 5.細心與責任感：對數字敏感，工作細心，能夠獨立作業並處理帳務 6.溝通與協調能力：能與內外部單位良好協作，確保財務資訊即時準確 7.相關證照：具備會計師或記帳士證照者優先 薪資、福利及辦公環境： 1. 高競爭力的薪資水準，保障年薪14個月 2. 依營運成效及個人績效決定年度調薪及額外獎金 3. 優於勞基法之休假規定，不補班、照常補假 4. 新穎辦公大樓、捷運交通方便、大直美麗華旁

職務內容： 1.USB/TBT/HDMI/DP/MIPI...etc 等高速介面規格制定 2.高速介面晶片產品之 晶片架構設計、韌體開發、晶片Silicon驗證 3.高速介面 FPGA 開發 and 驗證驗證 4.高速介面 ASIC 專案開發與設計 應徵條件： 1.碩士以上，電機工程、電控工程、電子工程、自動控制、資訊工程、資訊科學、動力機械相關科系畢業為主 2.熟悉 C、Python、Matlab、Git 3. 具備嵌入式系統開發/學習經驗者，或對 MCU/CPU 架構熟悉者佳 4. 具備基礎數位電路設計 and VLSI 基礎知識者佳 5. 有高速傳輸（不限介面）專業經驗與知識者優先

我們正在尋找嵌入式系統開發工程師加入我們的團隊。如果您熟悉操作系統（OS）或具有OS相關經驗，並且對系統單晶片（SOC）或高階微控制器（MCU）有一定的開發背景，歡迎您申請此職位。這是一個獨特的機會，可以參與先進網路產品的研發，並在車用技術領域有所拓展。 工作項目： 在團隊中參與或負責嵌入式系統的設計、開發和測試。 協助和主導網路產品如交換機（Switch）、路由器（Router）或閘道器（Gateway）的開發流程。 分析和解決開發過程中的技術問題，確保產品的高效性和穩定性。 與跨功能團隊合作，設計和實施符合行業標準的嵌入式程序。 參與車用產品的開發，確保系統的可靠性和安全性。 需求條件： 熟悉或具備操作系統（OS）相關知識和經驗。 具備系統單晶片（SOC）經驗，或有高階微控制器（MCU）的開發背景。 具有網路產品如交換機、路由器或閘道器的開發經驗。 對網路技術有一定的了解，例如TCP/IP協議、網路安全等。 具備車用產品開發經驗者優先考慮。 優秀的問題解決能力和團隊合作精神。

職務說明： 1. Create formal verification test plan. 2. Develop formal verification environment. 3. Run formal verification and regression, debug failures and analyze coverage. 4. Support other members in deploying formal verification. 5. Survey new formal applications and develop related workflow. 6. Enhance and maintain formal verification workflow. 徵才條件： A. Key qualifications : 1. Master‘s or above in Electrical Engineering, Computer Science. 2. Familiar with standard verification concepts and workflow. 3. Familiar with SystemVerilog and Verilog. 4. Familiar with scripting languages (Perl, Python, etc.). 5. Good communication skills. B. Preferred qualifications : 1. Familiar with SystemVerilog Assertion (SVA). 2. Familiar with formal verification methodology. 3. Familiar with formal tools (JasperGold, VCFormal). 4. Practical experience in formal verification, able to apply strategies to resolve issues during the verification process. 5. Familiar with bus protocol concept (AMBA). 6. Familiar with UVM methodology.

工作內容： 1. Server/Smart NIC 產品規劃 2. 市場調查、競爭對手分析、產品推廣及客戶開發 3. 內部專案管理、報告製作、跨部門協調/合作 4. 協助處理客戶開案及量產問題 應徵條件： 1. 5年伺服器產品之規畫或開發經驗，與有線網路相關者佳 2. 具備相關市場/應用及客戶推廣相關經驗 3. 抗壓性高、Team Player、反應速度快、效率高者佳 4. Strong written, verbal, and listening skills in English

工作項目： 1. 熟悉PADS Layout軟體 2. PCB零件建立與和文件管理歸檔 3. 進行PCB佈局和Layout走線，並生成PCB生產需要的Gerber文件 4. 有PADS Layout相關經驗佳 5. 其他主管交辦工作事項 應徵條件： 工作經驗不拘，有PADS相關layout經驗佳

職務說明： 1. 負責協助公司內部產品開發流程的智慧化與自動化 2. 提升 Digital Design Verification (DV) 的驗證效率與品質 3. 工作常與不同部門協調和討論需求，重視團隊溝通與合作，互相支援提醒 職務內容： 1. 開發與維護前後端系統、資料庫、API、自動化工具 2. 開發維護與內、外部系統工作流 & 資料流的串接 3. 與機器學習工程師及數位設計驗證 (DV) 工程師合作，開發客製化的應用程式或工作流程 職缺需求： 1. 熟悉 PHP、HTML、CSS、jQuery、JavaScript、MySQL 2. 熟悉 PERL 或 Python 3 3. 具 Docker、Kubernetes、Spark、Hadoop、Apache、AirFlow 者尤佳 4. 具備 LLM 觀念與應用開發經驗 5. 具 LangChain、LlamaIndex、vLLM 等 LLM Inference 框架使用經驗者尤佳 6. 具 Vector Database 開發經驗者尤佳 7. 具 AI Agentic Workflow 開發經驗者尤佳 8. 具 SystemVerilog、SVA、UVM、Design Verification 經驗者尤佳 9. 具 MLOps 經驗者尤佳 10. 具問題發現能力、問題分析能力、問題組織能力、問題解決能力、問題追蹤能力、溝通能力 11. Data Science、Data Engineering、Computer Science、Information Engineering、Electrical and Electronic Engineering、Physics 等相關科系畢業者佳 Position Overview: 1. Support the intelligentization and automation of the internal product development processes 2. Enhance the efficiency and quality of Digital Design Verification (DV) 3. Collaborate across departments to address requirements, with emphasis on team communication, cooperation, and mutual support Key Responsibilities: 1. Develop and maintain front-end and back-end systems, databases, APIs, and automation tools 2. Develop and maintain integration with internal and external systems, workflows, and data flows 3. Collaborate with machine learning engineers and digital design verification (DV) engineers to develop customized applications and workflows Qualifications: 1. Proficiency in PHP, HTML, CSS, jQuery, JavaScript, and MySQL 2. Proficiency in PERL or Python 3 3. Strong problem identification, analysis, organization, solving, and tracking abilities, along with excellent communication skills Preferred Qualifications: 1. Experience with Docker, Kubernetes, Spark, Hadoop, Apache, or AirFlow 2. Understanding of LLM concepts and application development 3. Experience with LLM Inference frameworks (LangChain, LlamaIndex, vLLM) 4. Experience with Vector Database development 5. Experience with AI Agentic Workflow development 6. Experience with SystemVerilog, SVA, UVM, or Digital Design Verification (DV) 7. Experience with MLOps Academic Background: Data Science, Data Engineering, Computer Science, Information Engineering, Electrical and Electronic Engineering, or Physics-related fields.

工作內容： 1. Provide pre-sales and post-sales support. 2. Understand customer requirements, and deliver technical presentations, reports, documents, and technology demonstrations. 3. Support customer product development and design. 4. Support customer issue analysis, resolution and management. 5. On-site support for debugging or certification tests. 6. Cross-functional collaboration with Realtek internal resources. 徵才條件： 1. M.S. or B.S. in Electrical Engineering or equivalent. 2. 3 to 5 years of progressive professional technical experience in IC design or related areas, direct experience in IC design house AE is preferred. 3. Strong analytical and problem-solving skills. 4. Strong written/verbal communication and negotiation skills with team spirit. 5. Being proactive and willing to take initiative. 6. Ability to work independently to achieve goals. 7. Ability to understand and explain technical issues and solutions to technical and non-technical personnel. 8. Medium or higher English skills. 9. Familiarity with Ethernet protocols will be a plus. 10. Familiarity with the Automotive ecosystem will be a plus. 11. Experience of Linux will be a plus.

職務說明： 1. 負責協助公司內部產品開發流程的智慧化與自動化 2. 提升 Digital Design Verification (DV) 的驗證效率與品質 3. 工作常與不同部門協調和討論需求，重視團隊溝通與合作，互相支援提醒 職務內容： 1. 將機器學習與人工智慧導入現有的工作流程，並與自動化系統整合 2. 與前端、後端工程師及數位設計驗證 (DV) 工程師合作，開發客製化的 data-driven 應用程式 3. 建構 Data 與 ML Pipeline 4. 開發與維護 ML Model、AI 上線後的性能監測與再訓練 5. 開發與維護 數據清洗、數據串接、數據監控、數據品質管理、Dashboard 6. 設計實驗以評估與分析導入 AI 後帶來的效益 職缺需求： 1. 精通 Python 3 2. 具備 Machine Learning 觀念、任一 ML / DL Framework 3. 具備 LLM 觀念與應用開發經驗 4. 具自行閱讀 AI / ML 論文的能力 5. 具資料科學相關背景，熟悉資料分析、資料視覺化、資料清理、資料處理 6. 具 Time Series Analysis and Forecasting、NLP、DRL、GNN 經驗者尤佳 7. 具 LangChain、LlamaIndex、vLLM、LLaMA Factory 等 LLM Inference 框架與 LLM Fine-tuning 使用經驗者尤佳 8. 具 RAG、Vector Database 開發經驗者尤佳 9. 具 AI Agentic Workflow 開發經驗者尤佳 10. 具 MLOps、MLflow 經驗者尤佳 11. 具 SystemVerilog、SVA、UVM、Design Verification 經驗者尤佳 12. 具問題發現能力、問題分析能力、問題組織能力、問題解決能力、問題追蹤能力、溝通能力 13. Data Science、Data Engineering、Computer Science、Information Engineering、Electrical and Electronic Engineering、Physics 等相關科系畢業者佳 Position Overview: 1. Support the intelligentization and automation of the internal product development processes 2. Enhance the efficiency and quality of Digital Design Verification (DV) 3. Collaborate across departments to address requirements, with emphasis on team communication, cooperation, and mutual support Key Responsibilities: 1. Implement machine learning and artificial intelligence solutions into existing workflows and integrate with automated systems 2. Collaborate with frontend, backend, and digital design verification (DV) engineers to develop customized data-driven applications 3. Construct Data and ML pipelines 4. Develop and maintain ML models, including post-deployment performance monitoring and retraining 5. Develop and maintain systems for data cleaning, integration, monitoring, quality management, and dashboards 6. Design experiments to evaluate and analyze the benefits of AI implementation Qualifications: 1. Expert proficiency in Python 3 2. Strong understanding of Machine Learning concepts and experience with at least one ML/DL framework 3. Knowledge of Large Language Models (LLMs) and experience in LLM application development 4. Ability to independently read and comprehend AI/ML research papers 5. Data science background with expertise in data analysis, visualization, cleaning, and processing 6. Strong problem identification, analysis, organization, solving, and tracking abilities, plus excellent communication skills Preferred Qualifications: 1. Experience with Time Series Analysis and Forecasting, Natural Language Processing (NLP), Deep Reinforcement Learning (DRL), or Graph Neural Networks (GNN) 2. Experience with LLM inference frameworks such as LangChain, LlamaIndex, vLLM, and LLM fine-tuning framework such as LLaMA Factory. 3. Experience with Retrieval-Augmented Generation (RAG) and Vector Database development 4. Experience developing AI Agentic Workflows 5. Experience with MLOps and MLflow 6. Experience with SystemVerilog, SVA, UVM, or Digital Design Verification (DV) Academic Background: Data Science, Data Engineering, Computer Science, Information Engineering, Electrical and Electronic Engineering, or Physics-related fields.

工作內容： 開發生醫感測器及周邊類比電路 徵才條件： 1. 碩士以上，具低雜訊低功耗類比電路設計經驗 2. 有SDM電路經驗尤佳

工作內容 1. 進行各項金融商品之投資分析與資料整理 2. 處理銀行交易作業 3. 定期投資報表編制及管理 4. 其他主管交辦事項 應徵條件： 1. 必備財報分析能力及英文能力 2. 會計、財金、數理統計相關科系畢業 3. 具1年以上之金融、證券相關工作經驗尤佳 4. 主動、積極完成上級交辦工作 工作地點：辦公室位於大直美麗華及忠泰樂生活旁，近捷運站

工作內容： 1. SSD 腳本開發，應用於確保SSD品質，產品類別有NVMe與SATA產品 2. SSD 相關軟體開發，MPTool與支持客戶需求 3. 自動化系統維護與優化 徵才條件： 1.碩士以上資訊相關領域人才 2.具5年以上相關經驗者佳 3.具Linux 以及 windows Driver相關知識者佳 5.具Android與Apple 相關軟體開發經驗者佳 6.具USB驗證經驗者佳

工作項目： Memory Compiler quality verification and support。 應徵條件： 1. 碩士以上; 電機、電子、資工相關科系畢業為主。 2. Familiar with front-end & back-end model including verilog, liberty (nldm/ccs/lvf), dft, redhawk, lef, spice view。 3. Familiar with physical verification flows including drc, erc, lvs, rc extraction。 4. Familiar with Hspice, Spectre, Solido simulation tool & Virtuso, Laker layout tool。 5. Familiar with Scripting language: Python/Verilog/TCL/Shell/Makefile/C。 6. 具以下條件者佳： (1) 熟悉SRAM操作原理及bit cell特性。 (2) 從事SRAM錯誤分析及良率改善。 (3) 具矽智財合約管理經驗。