1.教導幼童良好的基本生活習慣，並保護其安全 2.鼓舞幼童自我表現及參與團體生活，以促進其社會行為之正常發展 3.與父母共同討論幼童的行為表現與學習情形保育員

【配送工作】 使用公司小貨車進行日常配送（不需長途，路線熟悉後更輕鬆） 商品巡補貨，定點配送至合作店家或客戶 協助宅配或郵寄出貨 【倉庫協助】 協助貨品裝卸、整理與打包 基本倉儲進出貨紀錄、出貨單整理與開單 【簡易客戶服務】 負責貨款回收（部分客戶採貨到付款） 協助收集顧客回饋（不需陌生開發或業績壓力）

1.接受訂位或者是訂房並記錄（包含網路訂房) 2.接待顧客及結帳，安排房間 3.回答有關旅館、觀光等服務問題 4.為旅客轉交信件及留言 5.確認將離開之顧客房務狀況及每日帳務列表結帳 6.安排行李搬運、叫車等服務 需要懂簡單會計~

1.外場聯繫、顧客菜單諮詢、點餐供餐及桌面環境清潔 2.協助廚師烹調前與烹調中的準備工作

1.太陽能電廠設備日常巡檢、維護 2.監控系統每日分析與管理 3.太陽能電廠系統問題分析、故障排除、釐清與分析 4.相關工程技術支援 5.太陽能電廠維運紀錄 6.有證照及相關經驗佳

1.整理並上架布巾、毛巾、維護備品室的整潔 2.負責客房清潔與整理（更換床單、鋪床、擦拭桌面、吸塵等） 3.清潔衛浴設備與補充備品（牙刷、毛巾、衛生紙等） 4.處理客房退房與進房間之清潔作業 5.交辦之細清事項 6.回報房間損壞狀況或遺留物品 7.確保清潔用品的妥善使用與安全 8.其他主管交辦事項 9.每日最多需清理退房客房約12間。 需具備條件 ✦責任感與服務熱忱，細心、有耐性，能主動發現與解決問題。 ✦可配合彈性排班，具假日或輪班彈性者尤佳。 ✦體力狀況良好，能勝任需搬動物品的工作內容（如床墊、吸塵器等基本設備）。 上班時間：09:00～17:30 （休息時間：30分鐘） 每月休假：8~10天（每月享有 8 至 10 天休假，依勞動法規及公司排班規定安排。） 薪資與福利： ● 月薪 ● 勞健保、團保 ● 三節獎金 ● 客房清潔績效獎勵 ● 不定期員工聚餐

1.可評估工料依單位計算的單價,及評估報價 2.有統包能力 3.需發包能力(能提供至少一組報價) 4.製作工料表及工程進度表 5.工程項目毛利率計算 6.現場丈量 7.能看圖施作,基礎電力作業 8.能獨立作業 9.驗收作業及指導現場。

🌍【越南工作機會】木製玩具生產線經理｜月薪10萬起＋好福利💼 你有豐富的製造經驗、熱愛木製產品、擅長帶人又懂ERP？ 我們正在找一位 「能動手也能帶隊」 的生產經理，加入我們的越南工廠團隊，打造兼具創意與安全的木製玩具！ 📍工作地點 東南亞・越南廠區 No. 15, Group 6, Hamlet 5A, Thanh Loi Commune, Tay Ninh Province, Vietnam 💰薪資待遇 月薪 NT$100,000 元起（依經驗與能力調整） 👉 表現優異另有年終獎金、績效獎勵 ⚠️ 限具相關經驗者投遞 🎁福利制度 ✅ 提供住宿或住宿補助 ✅ 越南當地膳食供應（或餐補） ✅ 勞健保＋商業保險 ✅ 國內外差旅津貼 ✅ 每年返台探親假安排 ✅ 年度健檢、節日禮金 ✅ 完善教育訓練＋升遷制度 🧰 工作內容 • 管理木製玩具生產線：從原料、加工、組裝到品管皆由你統籌 • 規劃生產計畫，確保準時交貨並符合國際安全規範 • 監督木工機械操作與保養，確保機台效能與安全 • 與設計團隊配合，優化產品設計與工序，降低成本提升效率 • 負責供應鏈管理，與木材供應商議價、控管品質 🧑‍💼我們希望你具備… 🔹 學歷要求：大學以上，工業工程、機械工程、木材加工、產品設計、製造管理等科系尤佳 🔹 工作經驗： 　✔ 至少 5 年製造業／木材加工／木製品或玩具製造經驗 　✔ 具 2～3 年以上管理經驗，能領導團隊與跨部門協作 　✔ 熟悉木工機械（如精密割鋸、成型機、刨製機）優先 🔹 專業技能： 　✔ 熟悉生產規劃、排程、成本控制、庫存管理 　✔ 精通ERP系統並能導入流程管理 　✔ 了解木材特性（如夾板、密集板、木芯板等）與實際應用 　✔ 熟悉國際玩具安全標準（如 EN71、ASTM F963）及認證流程 　✔ 具產品設計或開發協作經驗尤佳 🔹 管理與溝通能力： 　✔ 領導力強，能激勵團隊、有效分配資源 　✔ 跨部門溝通協調力強，能與設計、供應商、銷售部門配合 　✔ 具備問題解決能力，能快速應對突發狀況 🔹 語言能力： 　⚠️ 需精通英文（書寫與口說皆需達商業溝通與管理層級） 🔹 加分條件： 　✔ 熟悉精益製造（Lean）或六標準差（Six Sigma）等管理方法 　✔ 具環保意識與綠色製造概念（如台灣木材 CAS 標章） 👋我們在找的就是你 如果你有豐富的木製產品或玩具生產經驗， 擁有領導力、技術力、責任感，並能用英文與國際團隊協作， 歡迎加入我們，一起打造世界級的創意木玩品牌！ 📩 馬上投遞履歷，我們等你來越南一起發光發熱！

架設、維修高壓輸電線路與電塔設備 高空作業（攀爬電塔 30–100 公尺） 緊急搶修，恢復停電供電 工作環境： 戶外作業，全台各地，地點不固定 可能遇高溫、低溫或雨天 條件要求： 體力佳、不怕高 可接受出差與戶外作業 基本電力或機械概念佳 無經驗可 完工獎金（視情況給） 無日領、無誠勿試

架設、維修高壓輸電線路與電塔設備 高空作業（攀爬電塔 30–100 公尺） 緊急搶修，恢復停電供電 工作環境： 戶外作業，全台各地，地點不固定 可能遇高溫、低溫或雨天 條件要求： 體力佳、不怕高 可接受出差與戶外作業 基本電力或機械概念佳 無經驗可 完工獎金（視情況給） 無日領、無誠勿試

【主要職責】 • 醫療器材代理 • 醫療院所(含眼科)供應、採購。 • 依照運輸相關法令，執行管制、簽派或監理等業務，以維護運輸作業之安全。 • 於組織架構中建立基礎職業安全衛生管理制度，控管運輸品質及風險。 【工作任務】 1.(GDP)執照申請/展延，並配合主管機關查核。 2.內部品質管理宣導、教育訓練 3.相關之文件新增、修訂、變更及保存 4.定期進行管理審查、提供統計分析資料與落實檢核追蹤 5.其他主管交辦事項 歡迎來電詢問 02-8685-7799

我們誠徵： 1、喜歡小孩，有耐心、愛心、細心。 2、喜歡學習新事物，願意接受挑戰。 3、良好的親師溝通能力。 4、願意在工作中學習和分享者。 5、協助幼兒學習自理生活。 6、配合學校相關教學事宜。 工作福利： 員工聚餐、三節禮金/禮盒、生日禮金、年終尾牙 ＠親切、活潑的團隊，福利制度完善、待遇佳。 ＠期待幼教新鮮人與有熱忱的幼教夥伴加入！！

1.繪製系統圖、組立圖、裝配圖、順序圖，以描述組件、裝配、系統和機器的功能關係。 2.針對測試有誤之設計不良原因做調整改善 3.改良舊機台或設計新機台以適應新產品之生產需求

①具備相關廚房工作經驗，熟悉基本的烹飪技巧和食材處理。 ②能獨立完成菜品的準備與烹飪。 ③熟悉衛生標準，能夠保持廚房清潔與整齊。 ④有露營或旅遊區烹飪經驗者優先。 ⑤能夠適應不定時的工作時間，包括周末及假日。。 ⑥有露營或戶外烹飪經驗者優先。 ⑦其他主管交辦事項。 🔸職位要求: ①高中職以上學歷。 ②個性親切、熱情,具良好溝通及服務技巧。 ③抗壓性佳，能配合輪班。 ④具備良好的時間管理能力及溝通能力，能在高壓環境下工作。 ⑤具相關工作一年以上經驗。 ⑥具團隊合作精神，能在壓力下工作。 💎. 平日排休/假日及國定假日須配合排班出勤 月休8天以上

Please also apply through: https://nxp.wd3.myworkdayjobs.com/careers/job/Hsinchu/Tape-Out-Engineer_R-10063230 Role Overview, Responsibilities, and Qualifications The Tape Out Engineer plays a crucial role in the semiconductor design process, serving as the final checkpoint before integrated circuit designs are sent for fabrication. This position is responsible for ensuring that all physical and logical design data meet manufacturing requirements and quality standards, working closely with design, program managers, technologists, and manufacturing teams to resolve issues and optimize outcomes. Key Responsibilities 1. Coordinate and execute the tape out process for semiconductor products, ensuring timely and accurate delivery of design data to manufacturing. 2. Verify design integrity by reviewing database and documentation, and addressing any discrepancies or errors. 3. Work collaboratively with cross-functional teams, including design, technologists, program managers, and process engineering, to resolve technical issues and optimize designs for manufacturability. 4. Ensure all deliverables conform to foundry requirements. 5. Maintain detailed records of tape out procedures, revisions, and outcomes for future reference and process improvement. Qualifications 1. Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field (Master’s preferred). 2. Experience with physical design tools (e.g., Cadence, Synopsys) and semiconductor manufacturing workflows. 3. Excellent attention to detail, problem-solving skills, and ability to work under tight deadlines. 4. Willingness to work with flexible working hours to support critical Tape-outs. Effective communication in English for collaborating across technical teams. This role is ideal for individuals with a passion for precision and innovation, seeking to contribute to the successful launch of leading-edge semiconductor products.

Please also apply on our platform: https://nxp.wd3.myworkdayjobs.com/careers/job/Hsinchu/APAC-Foundry-Operations-Senior-Principal-Engineer_R-10062827 Job Description The APAC Foundry Operation team works with foundry partners on technologies which are evaluated and/or subjected to production. The key areas of responsibility of the jobholder are: - Lead the release and transfer of process options at foundries. - Close collaboration with foundries, NXP technology groups, the business lines and various other stakeholders to qualify and release process - Lead and steer the projects towards timely completion to support NXP business needs. - Main decision maker on subjects related to process integration, striking a good balance between the various dynamics in a project; not limiting to technical judgement, resource planning, project schedule, logistics, supplier relationships etc. The requirement fulfilling the job: - Bachelor or MSc in physics, material engineering or electrical engineering. In-depth knowledge of semiconductor physics, process development and manufacturing. - ＞10 years of experience with semiconductor process integration, working in foundries’ production or development teams. - Hands on experience in being a lead; leading teams with responsibilities in development, transfer or production projects. - All rounded knowledge on process integration, product testing, reliability testing, tapeouts, device physics will be needed in the discharge of duties as a project/ integration lead. - Good communication skills. - Pro-active working attitude, creative, pragmatic, enterprising and result driven. - Having the ability to influence and steer a discussion. - Familiar in managing/working with foundries, maximizing leverage from foundries.

Job Responsibilities - To be the owner for manufacturing test on the released products. - Responsible for test program introduce to mass production - Responsible for NPI (after R-gate released) test data analysis and feedback to BL/PETE if any improvement needed - To be the owner for duplicated test hardware by performing debug and qualification, MSC (Gage R&R) analysis and release report - Responsible for 1st line hold lot disposition, including low yield, QA fail .......etc - To initial and work with related process owners on testing processes, documentation, and best practices - Participate in or drive test automation initiatives when applicable Required Qualifications - 3+ years of experience as a Test Engineer - Solid understanding of software/system testing methodologies - Familiarity with Linux environments and command-line operations - Experience with machine language (e.g., Java, C++) - Experience in system, embedded, hardware, or manufacturing testing - Strong analytical and problem-solving skills - Strong sense of ownership and responsibility for product quality English communication, reading, writing

Role Summary: The NVM Reliability team is responsible for characterizing, modeling, and enabling next-generation Non-Volatile Memory technologies, enabling new product creation company-wide. Job Responsibility: －Interface with foundries and other external suppliers of technology and IP to assess reliability margin to product applications. －Establish qualification requirements for new technology and product introduction. －Perform rigorous statistical analysis of reliability characterization data. －Enable high reliability during volume production by working with product groups to address risk areas. －Support business groups with customer requests for technical information, including reliability characterization results, risks assessments, and consultation on issues. －Communicate study conclusions and recommendations to internal and external teams. Job Qualification: －Bachelor‘s, Masters, or Doctoral degree in Electrical Engineering, Applied Physics, or equivalent, with 10 years of industry experience. －Experienced in data processing and analysis (e.g. Python, JMP, Matlab, Exensio). －Software development experience, such as familiarity with microcontroller software development (C/C++) is desired. －Interest in statistics and solid-state device fundamentals, especially as applied to emerging non-volatile memory technologies like MRAM and RRAM. －Must be curious, proactive, and detail-oriented. －Able to work in a team environment, communicate effectively in English and Mandarin, and solve problems.

***Please apply for this position on NXP official website: https://pse.is/8ms2kr Role Purpose Lead the development and optimization of high-voltage (HV) and BCD device architectures. This role requires a deep understanding of device physics and a data-driven approach to ensure industry-leading performance and reliability for power management solutions. Key Responsibilities － Device Development: Lead the architecture design and optimization of HV devices (LDMOS, EDMOS, ESD) on 180nm to 55nm BCD nodes. － Physics Analysis: Analyze and optimize Device Physics parameters, including BV, Rdson, SOA, and reliability (HCI/NBTI). － Simulation & Modeling: Utilize TCAD for 2D/3D process and device simulations to accelerate development cycles. － Device Verification: Define verification plans and execute statistical analysis using JMP for DOE and WAT data. － Design Integration: Work within Cadence environments for layout review and test structure design. － Cross-functional Collaboration: Partner with PI and PE teams to resolve yield, reliability, and manufacturing bottlenecks. Required Qualifications － Experience: Master‘s or Ph.D. in EE, Physics, or related field with 10+ years of semiconductor industry experience. － Technical Expertise: 1. Profound knowledge of Device Architecture and Device Physics. 2. Hands-on experience in 180nm to 55nm BCD process nodes. － Tools: 1. Expertise in TCAD (Sentaurus / Silvaco). 2. Expertise in JMP for statistical data analysis. 3. Proficiency in Cadence (Layout/Virtuoso). Preferred Qualifications (Plus) － Advanced Power Devices: Experience with GaN, SiC, or IGBT development. － Silicon Photonics: Knowledge of Photonics integration and device physics. － Domain Knowledge: 1. Process Integration (PI): Understanding of mask flow and doping profiles. 2. Product Engineering (PE): Experience in CP/FT data correlation and yield enhancement. Competencies － Accountability: Strong ownership of project milestones and outcomes. － Critical Thinking: Ability to identify root causes in complex device failures. － Interpersonal Skills: Effective communication across design and foundry teams. － Data-driven: Committed to objective decision-making through rigorous data analysis.

The key areas of responsibility of the jobholder are: - Collaborate closely with foundries, NXP technology teams, and business lines to qualify and release advanced FinFET processes. - Provide technical leadership in semiconductor device physics, especially in FinFET architecture and behavior. - Interface with internal and external stakeholders on critical development and transfer projects. - Lead and steer projects to meet timelines and business objectives. - Make key decisions on process integration, balancing technical, logistical, and strategic factors. - Support NTI process transfers within foundries and NXP joint ventures Requirements / preferences: - Bachelor‘s or Master‘s degree in Electrical Engineering, Physics, or related field. - Minimum 10 years of experience in semiconductor device engineering, with a strong focus on advanced logic/RF devices. - Proven hands-on experience with HKMG and FinFET technologies in production or development environments. - Deep understanding of semiconductor device physics, especially HKMG and FinFET. - Strong analytical skills in yield enhancement and electrical data analysis. - Fluent in English and Mandarin. - Demonstrated leadership in development, transfer, or ramp-up projects. - Excellent communication and influencing skills. - Proactive, pragmatic, and results-driven mindset. - Experience working with foundries and leveraging external manufacturing capabilities .