成大專區

(1) Server BMC firmware development and porting. (2) Embedded Linux System development. ※依學經歷、工作年資敘薪

1.Familiarity with VHDL/Verilog coding and FPGA/CPLD design flow is a must 2.Familiarity with FPGA/CPLD design in server application and bus protocols including I2C / power sequence / SPI / LPC / SGPIO / I2C switch/ UART / PWM / eSPI 3.Familiarity with Lattice/Altera EDA design tool. 4.Strong HW and x86 architecture knowledge. 5.Integration and simulation experience 6.Issue Fail symptom Anlayze and Tracker ※依學經歷、工作年資敘薪

1.進行 Web 前後端軟體開發。 2.開發自動化工具，提高開發與測試效率。 3.維護與優化既有軟體，確保系統穩定運行。 4.研究並應用 AI 技術於相關軟體開發。 5.優化程式設計開發流程與架構。 6.有電路或是機構設計經驗尤佳。 ※依學經歷、工作年資敘薪

1.Familiarity with VHDL/Verilog coding and FPGA/CPLD design flow is a must 2.Familiarity with FPGA/CPLD design in server application and bus protocols including I2C / power sequence / SPI / LPC / SGPIO / I2C switch/ UART / PWM / eSPI 3.Familiarity with Lattice/Altera EDA design tool. 4.Strong HW and x86 architecture knowledge. 5.Integration and simulation experience 6.Issue Fail symptom Anlayze and Tracker ※依學經歷、工作年資敘薪

1.負責執行主管指派之 Server DC Power 設計開發、驗證與維護工作，確保任務如期完成。 Responsible for Server DC Power design development, validation, and maintenance tasks assigned by management to ensure project schedules are achieved. 2.定期回報工作進度，主動提出問題分析與改善建議方案。 Provide regular project status updates and proactively propose issue analysis and improvement solutions. 3.執行專案 DC Power 驗證與問題分析，確保產品穩定性與可靠性。 Perform DC Power validation and issue analysis to ensure product stability and reliability. 4.執行各類 DC Power 新方案驗證與測試，提升產品效能與市場競爭力。 Evaluate and validate new DC Power solutions to improve product performance and competitiveness. 5.協助電源線路 debug、測試調校與設計優化。 Support power circuit debugging, tuning, and design optimization activities. 6.與 EE、Layout、Thermal、SI、FW、ME 與供應商合作，協助專案開發與問題排除。 Collaborate with EE, Layout, Thermal, SI, FW, ME teams, and vendors to support project development and issue resolution. ※依學經歷、工作年資敘薪

1.Identify and target potential customers for server solutions. 2.Analyze competitors and understand their offerings to better position our products. 3.Prepare and deliver sales presentations tailored to the client‘s needs. 4.Manage sales projects, including coordinating with cross-functional teams to deliver products and solutions that comply with client requirements. 5.Prepare regular reports on sales performance, market feedback, and customer needs. 6.Develop and implement strategic sales plans to achieve sales targets.

1. Responsible for logistics planning and identifying operation issues to ensure compliance with worldwide export/import regulations 2. Collaborate with cross-functional teams to arrange shipments and ensure timely delivery 3. Manage VMI Hub for receiving, pulling, inventory activities and co-work with Hub suppliers to maintain VMI accuracy and monitor discrepancies 4. Maintain and develop positive working relationship with customer Buyer and work through PO, AR, billing, invoicing, and accounting issues 5. Track and analyze supply and demand on a weekly basis to report discrepancies to Sales 6. Review operation process and explore optimal solutions to achieve efficiency ※依學經歷、工作年資敘薪

【AITE】(Automation Infrastructure and Tools Engineering) team: provide automation & tools solution to support server design, validation and MFG production. (1) BMC/BIOS/HW/performance test tools and automation (2) MFG L6/L10/L11 etc. test solution (3) Automation test platform development 工作內容: 1.負責伺服器診斷平台於設計驗證（Design Validation, DV）與量產製造（Manufacturing, MFG）階段之整體架構規劃與設計。 2.建立並制定 Diagnostic Platform、Validation Framework、Automation Infrastructure 與測試流程標準。 3.規劃並整合 X86 Server 系統相關診斷方案，涵蓋 CPU、DIMM、NIC、GPU、Switch、PDU、Storage、NVMe 與相關子系統。 4.主導系統架構演進、技術決策與平台最佳化，提升系統可擴展性（Scalability）、可維護性（Maintainability）與穩定性（Reliability）。 5.建立跨 Design Validation 與 Manufacturing 共用之診斷框架與平台架構。 6.與硬體、韌體、軟體、Validation、Manufacturing 及全球研發團隊跨部門合作，制定技術策略與開發標準。 7.提供全球開發團隊技術方向與架構指導，推動跨區域（Cross-Geo / Cross-Site）技術合作與最佳實務建立。 8.評估新技術與新平台需求，制定未來 Server Diagnostic Platform 技術藍圖（Technical Roadmap）。 9.帶領開發團隊落實架構設計，協助解決高複雜度系統問題與平台整合議題。 ※依學經歷、工作年資敘薪 Job Description: 1. Lead architecture planning and design of server diagnostic platforms across Design Validation (DV) and Manufacturing (MFG) environments. 2. Define and establish diagnostic platforms, validation frameworks, automation infrastructure, and testing standards. 3. Architect and integrate diagnostic solutions for X86 server systems, including CPU, DIMM, NIC, GPU, Switch, PDU, Storage, NVMe, and related subsystems. 4. Drive platform evolution, technical decision-making, and system optimization to improve scalability, maintainability, and reliability. 5. Establish unified diagnostic frameworks and shared platform architecture across validation and manufacturing environments. 6. Collaborate cross-functionally with hardware, firmware, software, validation, manufacturing, and global engineering teams to define technical strategies and development standards. 7. Provide technical leadership and architectural guidance to global development teams while promoting cross-geo technical collaboration and best practices. 8. Evaluate new technologies and define future technical roadmaps for server diagnostic platforms. 9. Lead development teams in implementing architecture designs and resolving complex system-level technical issues.

Projects managed by Compal Medical Product Development Division include the following areas: 1.Medical product category 2.Wearable product category 3.Sports, leisure, and entertainment category 4.Smart IoT (Internet of Things) category Firmware Engineer – Key Responsibilities 1.Design -Provide system architecture, perform analysis, and define functional specifications. 2.Implementation -Setup development environment of the embedded systems, including RTOS-based and bare-metal firmware. -Develop, integrate, and maintain bootloader, kernel, GUI, and core firmware functions. -Develop, integrate, and maintain drivers and functions for sensors, motors, and wired/wireless communication. 3.Performance Optimization -Design, implement, and optimize algorithms for system performance. -Define and develop communication protocols. 4.Verification -Create test plans, develop testing tools, and generate detailed test reports. 5.Documentation & Compliance -Prepare and maintain design and technical documentation. -Ensure all processes comply with ISO standards.

這是一個結合尖端 AI 技術與硬體工程領域的職位。我們正在招募具備熱情、能利用大語言模型 (LLM) 解決複雜工程問題的開發者。你將負責開發智慧代理人 (AI Agent)，整合內部技術文件與設計工具，直接輔助伺服器研發流程。 工作內容 1.AI Agent 架構設計與開發： 基於 LLM 開發具備任務規劃與執行能力的 AI Agent，用於輔助硬體工程師進行電路設計、零件選型及規範查詢。 2.RAG 系統建置與優化：負責檢索增強生成 (RAG) 系統開發，包含向量資料庫架構設計。 3.MCP 生態系整合： 利用 Model Context Protocol (MCP) 打造標準化接口，串接不同部門的知識庫與外部自動化工具（如 OrCAD 或其他相關模擬軟體）。 4.知識架構建置： 負責開發結合向量檢索與知識圖譜 (Knowledge Graph) 的 GraphRAG 系統，針對伺服器硬體組件間的複雜相依關係進行關聯建模。 5.研發流程自動化：將 AI 能力嵌入硬體開發生命週期，包含自動生成電路圖草案、零件選型推薦及規格合規性檢查。 6.輔助工具自動化： 開發自動化腳本或 API，將 AI 輸出結果整合進硬體設計流程，提高研發與驗證效率。 7.前瞻技術追蹤： 主動追蹤並評估最新的 AI 框架或技術。 ※依學經歷、工作年資敘薪

1. LCM/TP/Camera/PL sensor/PPG Design and Design Issue Debugging 2. Optical Design Review with Customers and Venders 3. Projects Schedule Managements for Optical Function 4. Optical Module PCBA/FPC Schematic and layout Design Review 5. LCM/TP/Camera Electrical Performance Validations 6. Defining Optical Part Incoming Inspection Criterion 7. Optical Module Assembly Troubleshooting in Factory Side 8. Optical parts roadmap planning and innovation 9. Team members coaching and technical document organization

1.系統整合測試： 執行Server整機功能驗證，確保 BIOS、BMC、FPGA 與周邊裝置(NIC, RAID, NVMe, GPU)之相容性與穩定度。 2.OS與驅動程式驗證： 驗證主流作業系統(Ubuntu, RedHat, Windows Server)在不同Kernel版本下的驅動程式相容性，並維護Driver List Baseline。 3.問題除錯與分析： -針對測試中發生的System Hang、Crash、Kernel Panic進行第一線除錯。 -利用Log分析工具(dmesg, SEL, SOL, UART log)釐清問題根源(HW/FW/OS Issue)。 4.Bug追蹤與協作： 撰寫精確的Issue Report，協助RD複製問題並驗證解決方案。 5.測試環境維護： 架設並維護PXE Server、Console Redirect等測試基礎設施。

1. 帶領專案團隊人員共同達成專案目標 2. 新產品開發專案規劃，時程管理，並統籌各研發部門工作、跨部門溝通協調 3. 產品量產導入：含生產計畫、物料準確性到試產、生產期程等 4. 產品開發驗証作業評估及執行與技術文件之撰寫

1. Responsible for handling RFQ/RFI and NPI phase or MP phase quotations, logistics planning, and resolving unexpected issues to ensure schedule adherence. 2. Collaborate with cross-functional teams to ensure timely transition of projects into mass production. 3. Build and maintain strong working relationships with customers. 4. Review operational processes and identify optimal solutions to improve efficiency. 5. Track and analyze improvement opportunities through weekly reviews. 6.Prepare and deliver customized sales presentations tailored to specific client needs. ※依學經歷、工作年資敘薪

【AITE】伺服器Diag開發工程師（BMC/BIOS/HW） 工作內容： AITE(Automation Infrastructure and Tools Engineering) team: provide automation & tools solution to support server design, validation and MFG production. (1) BMC/BIOS/HW/performance test tools and automation (2) MFG L6/L10/L11 etc. test solution (3) Automation test platform development 此職位主要使用 Python 進行 BMC/BIOS/HW 測試案例自動化。 ※依學經歷、工作年資敘薪 CS or EE Master/Bachelor with 0~3 years experience (工A) CS or EE Master/Bachelor ＞ 3 years experience (高工級) CS or EE Master/Bachelor ＞ 5 years experience (課長級)

1.車用電子產品客戶開發與業務拓展 2.車用電子產品市場分析及行銷策略規劃 3.善於跨部門溝通，負責客戶與研發團隊之專案執行

NB電機模組類採購管理工作(EM Sourcing): 熟散熱模組, 線材, 連接器,影像聲學模組,etc (1)NB 模組類材料成本估算。 (2)製程開發/導入。 (3)供應鏈開發與管理。 (4)產業分析, 原物料與價格趨勢。 ※依學經歷、工作年資敘薪

1. 零件採購 2. 供應鏈管理 3. 原料成本談判及規劃產能 4. 跨職能及部門合作，與Buyers, R&D, sales, PM...等協作 ※依學經歷、工作年資敘薪

About the role: The AI/ML Test Engineer is responsible for verifying and validating embedded software used in automotive systems. This role ensures that software meets functional, performance, safety, and quality requirements across all stages of the development lifecycle. The position requires strong knowledge of software/machine learning testing methodologies, automotive systems, and embedded software, along with hands-on experience in software test execution and automation. Key Responsibilities: • Design, develop, and execute test cases based on algorithm and machine learning system requirements using Python. • Thermal algorithm and model performance testing: test the object detection model like detection of pedestrians, cyclists and wildlife during harsh environmental conditions, validate that thermal noise sources do not trigger false collision warnings or phantom braking, evaluate model performance under stress conditions or lens occlusion. • Configure and maintain test environments, mainly Software-in-the-Loop and Hardware-in-the-Loop setups. • Identify, document, and track defects; support root-cause analysis and collaborate with development teams for resolution. • Ensure full traceability between requirements, test cases, and results; support audits, reviews, and compliance with ASPICE, SOTIF and ISO 26262.

Key Responsibilities: • Lead V&V teams across software, hardware, and system domains. • Coordinate test activities with design, development, quality, and customer teams. • Creation of specifications and tests for the AI module, including integration test and system test • Define V&V milestones aligned with project timelines and product releases. • Support audits and assessments (ASPICE, ISO 26262, OEM-specific processes). • Develop and maintain test strategy, test plans, and test specifications. • Define validation environments (HiL, SiL, vehicle test, test benches, simulation). • Ensure traceability between requirements, test cases, and results. • Oversee execution of unit, integration, system, and acceptance testing. • Approve test procedures and ensure correct usage of test tools and equipment. • Review test results, analyze defects, and drive corrective actions. • Ensure proper documentation for compliance and release readiness. • Oversee the validation of AI and Vision models, evaluating their accuracy, robustness, and performance metrics. • Establish standardized validation workflows by developing automated scripts for vision-related testing and data analysis. • Provide actionable optimization recommendations to the development team based on empirical test results and performance analysis. • Ensure alignment with automotive standards such as: ASPICE (Automotive SPICE), ISO 26262 (Functional Safety), ISO 21448 (SOTIF), OEM-specific requirements (Toyota, Honda, VW, GM, etc.) • Build and lead a V&V team of 4 members, defining clear testing lifecycles, bug tracking standards, and reporting protocols for AI-driven products.