研發替代役專區

1.對銷售業務工作有興趣，富強烈企圖心、且善於溝通 2.開發客戶，拓展市場，以達成業績目標 3.聯繫、回訪服務經營客戶關係，以取得訂單 4.協助開發找尋有意將屋頂出租做太陽能光電的住宅.廠房或土地 5.場勘設計規劃太陽能光電的裝置量 6.洽談租屋頂相關的回饋條件及客戶追蹤 7.協助案件公證租賃或工程合約簽訂

主任48000~60000 幼教師38000~45000 享勞保、勞退、升遷、國外旅遊….福利等. 上班地點 板橋、土城、三峽、中和、三峽、天母、東湖、汐止、淡水、林口 主任: 1. 大學畢業(幼教相關或資訊相關科系為佳) 2. 負責行政相關庶務 3. 協助教學保育相關業務 4. 擅長電腦文書作業 5. 具園所長證照 幼教師: 1.協助幼兒學習自理生活。 2.提供幼兒日常生活（如：飲食、大小便等）的照顧。 3.維護幼兒在園所之安全。 4.配合幼教班與家長的需要，教授幼兒特殊課程，如：美語、繪畫、注音符號正音等。 5.配合幼兒發展狀況，設計、撰寫課程教案。

（1） 評量設計與教材編輯、撰寫。 （2） 其他交辦業務。 需進公司工作，不接受遠距辦公。

1.網路及電信佈線 2.門禁系統安裝 3.須配合加班 4.須配合無塵室施工 5.有工程相關經驗尤佳 6.主管交辦任務 〝意者請先MAIL 1111制式履歷表,合者再通知面試〝 ★★合適者會以電話通知面試時間,請留意來電電話並回電★★

1、麵點類餐點製作 2、個性積極主動，有責任感。 3、負責煎檯、蒸檯。維持產品品質的一致性。 4、廚房環境清理。 5、可配合輪班。 福利制度： 獎金類 1、全勤獎金：當月無請假、遲到早退者，全勤獎金2000元 2、年終獎金：依年資發放 3、三節禮金 制度類： 1、提供員工制服 2、提供員工膳食 3、員工消費折扣 4、過年期間(除夕至初六)休年假 保險類 1、勞保 2、健保

正式人員年薪50萬以上(依工作經驗及表現而定) *上線後另有業績獎金、汽車津貼、員工分紅* 1.醫療儀器產品,透析器材及相關產品之銷售 2.具業務銷售及市場分析 市場調查能力 3.醫學相關科系畢業或有醫療器材銷售經驗者優先考慮

🔥【CNC銑床技師｜月薪45,000～50,000元｜週休二日｜供餐福利】🔥✨ 熟三菱系統 × 可獨立作業 × 技術型高薪職缺 ✨ 如果你有 CNC銑床操作經驗，會看圖、會校機，想找一份 薪資穩定、制度完整、可以長期發展的工作，歡迎加入我們的團隊，一起把技術發揮到最好。 【你會愛上的理由】 🔸 月薪45,000～50,000元，加班費另計 🔸 週休二日，作息穩定生活品質佳 🔸 上班日提供餐食，減少日常開銷 🔸 享勞健保與6％勞退提撥，制度完善 🔸 三節禮金與年終獎金，福利完整 🛠【工作內容】 1️⃣ CNC銑床機台操作與日常維護 2️⃣ 依圖面進行校機與加工設定 3️⃣ 編寫加工程式並確保加工品質 4️⃣ 能獨立作業者佳 5️⃣ 熟三菱系統與 Mastercam 軟體者佳 ⏰【上班時間】：08:00～17:00（中午休息1小時） 📅【休假制度】：週休二日 💰【薪資待遇】：月薪45,000～50,000元（依能力調整，加班費另計） 🎁【福利制度】 ✨ 勞保、健保、6％勞退提撥 ✨ 年終獎金 ✨ 三節禮金 ✨ 上班日供餐 ✨ 員工聚餐 ✨ 結婚補助、生育補助、喪葬補助 ✨ 制服提供 📍【工作地點】：台中市神岡區神洲路182巷25號 【應徵聯絡方式】 📞 市話：(04)2535-9992 👤 聯絡人：鄭小姐 📌 面試時會安排實作測驗 📌 需具一年以上相關工作經驗 📌 須能配合加班 👉 有興趣的朋友歡迎直接投遞履歷喔～ 👉 有相關工作經驗者，歡迎直接來電與我們聯繫，我們會為您安排面試時間，期待您的加入！

(一) 你知道嗎？我們正在為英明校及鳳新校尋找熱情滿滿的夥伴！加入我們吧！ 🎯 加入我們，你將負責： 1. 控管班級秩序，營造積極的學習氛圍 2. 協助批改作業和考卷，細心指導學生進步 3. 處理班務相關事項，確保日常運作有條不紊 4. 與家長聯繫，提供孩子學習狀況的回饋 🌟 我們提供 - 完備的培訓機制，零經驗也能安心加入！ - 制度化的合作模式，適應良好即可轉為正職！ 準備好發揮你的語文基礎，陪伴學生邁向更好的成長之路了嗎？快來和我們一起改變未來吧！

1.冷凍庫作業 (入貨、出貨、儲位整理、開單、盤點)。 2.堆高機操作。 3.拆櫃、裝櫃。 4.需輪班，可配合加班。 5.協助客戶進出貨事宜。 6.工作環境清潔及維謢。 7.冷凍機具及設備基礎維護及保養。 8.其他主管交辦事項。

Please also apply through: https://nxp.wd3.myworkdayjobs.com/careers/job/Hsinchu/Tape-Out-Engineer_R-10063230 Role Overview, Responsibilities, and Qualifications The Tape Out Engineer plays a crucial role in the semiconductor design process, serving as the final checkpoint before integrated circuit designs are sent for fabrication. This position is responsible for ensuring that all physical and logical design data meet manufacturing requirements and quality standards, working closely with design, program managers, technologists, and manufacturing teams to resolve issues and optimize outcomes. Key Responsibilities 1. Coordinate and execute the tape out process for semiconductor products, ensuring timely and accurate delivery of design data to manufacturing. 2. Verify design integrity by reviewing database and documentation, and addressing any discrepancies or errors. 3. Work collaboratively with cross-functional teams, including design, technologists, program managers, and process engineering, to resolve technical issues and optimize designs for manufacturability. 4. Ensure all deliverables conform to foundry requirements. 5. Maintain detailed records of tape out procedures, revisions, and outcomes for future reference and process improvement. Qualifications 1. Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field (Master’s preferred). 2. Experience with physical design tools (e.g., Cadence, Synopsys) and semiconductor manufacturing workflows. 3. Excellent attention to detail, problem-solving skills, and ability to work under tight deadlines. 4. Willingness to work with flexible working hours to support critical Tape-outs. Effective communication in English for collaborating across technical teams. This role is ideal for individuals with a passion for precision and innovation, seeking to contribute to the successful launch of leading-edge semiconductor products.

Please also apply on our platform: https://nxp.wd3.myworkdayjobs.com/careers/job/Hsinchu/APAC-Foundry-Operations-Senior-Principal-Engineer_R-10062827 Job Description The APAC Foundry Operation team works with foundry partners on technologies which are evaluated and/or subjected to production. The key areas of responsibility of the jobholder are: - Lead the release and transfer of process options at foundries. - Close collaboration with foundries, NXP technology groups, the business lines and various other stakeholders to qualify and release process - Lead and steer the projects towards timely completion to support NXP business needs. - Main decision maker on subjects related to process integration, striking a good balance between the various dynamics in a project; not limiting to technical judgement, resource planning, project schedule, logistics, supplier relationships etc. The requirement fulfilling the job: - Bachelor or MSc in physics, material engineering or electrical engineering. In-depth knowledge of semiconductor physics, process development and manufacturing. - ＞10 years of experience with semiconductor process integration, working in foundries’ production or development teams. - Hands on experience in being a lead; leading teams with responsibilities in development, transfer or production projects. - All rounded knowledge on process integration, product testing, reliability testing, tapeouts, device physics will be needed in the discharge of duties as a project/ integration lead. - Good communication skills. - Pro-active working attitude, creative, pragmatic, enterprising and result driven. - Having the ability to influence and steer a discussion. - Familiar in managing/working with foundries, maximizing leverage from foundries.

***Please upload English resume onto our official platform: https://reurl.cc/qpRoqg Job Description - To work with operation/maintenance to ensure production smoothly. - To assist action confirmations with system monitors. - To work with Engineers for yield improvements from the study of stable plasma cleaning as the leading indicator. Job Qualification: - Understanding of Plasma cleaning principle for wire bonding Integrity Chip die pad/wire type/Lead-post structures - Bachelor‘s or Master‘s student in Material/Science/Electronic Engineering or related - Available to work at least 3 days/week. - Good verbal and written English communication skills - MS Office or Programming skill - Self-motivated, results oriented, willing and eager to learn, proactive attitude

Job Description -　Main contact window with business lines (BLs) to deliver a high quality and manufacturable product for IC test production, meeting or exceeding the required time to market or product cost. -　Take lead of new product introduction (NPI) for IC test -　To coordinate with related BLs (business line) and align with wafer/final test factories to prepare the product transfer -　To improve new product introduction procedure to enable smooth product transfer -　To reduce risk and impact to customers and factories, escalation management, e.g. reduce risk and impact by right and timely escalation -　To ensure no gap on test tooling availability Facilitate IC test data review and process for planning forecast, take responsibility on test technical data (and improvement plan) in time and accuracy -　To follow up test improvement projects, hold lots, progress of New Product Introduction, test buy off…etc. -　Process of Test Engineering Notice and Enovia ECO Requirement -　Bachelor degree (or above), Engineering background is preferred. -　Excellent communication skills (English/Mandarin, TOEIC＞600) -　Good logic thinking -　Be familiar with MS Office tool -　1 yrs experience in IC testing or related working experience is preferred

- Ensure compliance with Taiwan electrical regulations, SEMI standards, and safety codes. 負責廠區電力系統之運轉、維護及管理，確保符合台灣電業法規、SEMI規範及相關安全要求。 - Manage and maintain facility electrical systems, including: High/low voltage distribution (HV/LV), Switchgear, transformers, UPS, and generators. 負責廠務電力系統設備之日常管理與維護，包括：高低壓配電系統（HV/LV）/ 開關設備（Switchgear）/ 變壓器（Transformer）/ UPS不斷電系統 / 緊急發電機系統（Generator） - Proficient in AutoCAD for electrical drawings and single line diagrams 繪製及維護電力系統圖面，包含 AutoCAD 電氣圖及單線圖（Single Line Diagram）。 - Strong knowledge of high-voltage power systems, including: Protective relay operation, Single line diagram development and interpretation, Familiar with motor control systems. 負責高壓電力系統規劃、操作與分析，包括：保護電驛（Protective Relay）設定與應用 / 單線圖建立與判讀 / 馬達控制系統（Motor Control System）管理與改善 - Handle emergency response for power-related incidents and recovery planning. 處理廠區電力異常事件，執行緊急應變、故障排除及復電計畫。 - Ensure power reliability and quality to support critical manufacturing tools 確保廠區關鍵電力系統穩定運作，維持生產設備供電可靠度與電力品質。 - Monitor and improve system performance, capacity, and efficiency. 監控電力系統運轉績效，持續改善系統容量、可靠度與能源使用效率。 - Lead preventive maintenance (PM), especially annual electricals PM activity and troubleshooting for power systems. 規劃及執行預防保養（PM）作業，包含年度高低壓停電保養、設備點檢及電力系統故障分析。 - Coordinate power system upgrades, expansions, and projects 負責電力系統擴充、升級及改善專案規劃與執行。 - Support new tool installation(Hook-up) and capacity ramp-up planning. 配合產線及機台建置需求，執行廠務配電規劃、Hook-up二次配支援及產能擴充評估。 - Analyze power consumption and drive energy-saving initiatives. 分析廠區用電數據，推動節能改善專案及能源管理措施，提升整體能源使用效率。 Qualifications: - Bachelor‘s degree or above, preferable in Electrical Engineering 大學以上學歷，電機工程、電力工程等相關科系尤佳。 - At least 3+ years of experience in industrial or semiconductor facilities. 具 3 年以上廠務電力系統、工業配電系統或半導體廠務相關工作經驗。 - Relevant certifications is a plus. (Electrical Engineer license, HV certification, etc.) 具電機技師、高壓電工作業相關證照者優先。 - Familiar with PLC operation and basic control logic is a plus. 熟悉 PLC 操作及基礎控制邏輯者佳。 - Experience in Energy Management Systems (EMS), such as ISO 50001, and HVAC systems is a plus. 具能源管理系統EMS(Energy Management System)或 ISO 50001 能源管理系統導入經驗者佳。 - Experience in facility utility systems such as central air conditioning and chilled water systems is preferred. 具 中央空調、冰水系統等廠務公用系統經驗者佳。 - Experience in facility operations within semiconductor Assembly & Test (A&T) plants is highly preferred. 具半導體封裝測試廠（Assembly & Test）廠務經驗者尤佳。

Job Responsibilities - To be the owner for manufacturing test on the released products. - Responsible for test program introduce to mass production - Responsible for NPI (after R-gate released) test data analysis and feedback to BL/PETE if any improvement needed - To be the owner for duplicated test hardware by performing debug and qualification, MSC (Gage R&R) analysis and release report - Responsible for 1st line hold lot disposition, including low yield, QA fail .......etc - To initial and work with related process owners on testing processes, documentation, and best practices - Participate in or drive test automation initiatives when applicable Required Qualifications - 3+ years of experience as a Test Engineer - Solid understanding of software/system testing methodologies - Familiarity with Linux environments and command-line operations - Experience with machine language (e.g., Java, C++) - Experience in system, embedded, hardware, or manufacturing testing - Strong analytical and problem-solving skills - Strong sense of ownership and responsibility for product quality English communication, reading, writing

Role Summary: The NVM Reliability team is responsible for characterizing, modeling, and enabling next-generation Non-Volatile Memory technologies, enabling new product creation company-wide. Job Responsibility: －Interface with foundries and other external suppliers of technology and IP to assess reliability margin to product applications. －Establish qualification requirements for new technology and product introduction. －Perform rigorous statistical analysis of reliability characterization data. －Enable high reliability during volume production by working with product groups to address risk areas. －Support business groups with customer requests for technical information, including reliability characterization results, risks assessments, and consultation on issues. －Communicate study conclusions and recommendations to internal and external teams. Job Qualification: －Bachelor‘s, Masters, or Doctoral degree in Electrical Engineering, Applied Physics, or equivalent, with 10 years of industry experience. －Experienced in data processing and analysis (e.g. Python, JMP, Matlab, Exensio). －Software development experience, such as familiarity with microcontroller software development (C/C++) is desired. －Interest in statistics and solid-state device fundamentals, especially as applied to emerging non-volatile memory technologies like MRAM and RRAM. －Must be curious, proactive, and detail-oriented. －Able to work in a team environment, communicate effectively in English and Mandarin, and solve problems.

***Please apply for this position on NXP official website: https://pse.is/8ms2kr Role Purpose Lead the development and optimization of high-voltage (HV) and BCD device architectures. This role requires a deep understanding of device physics and a data-driven approach to ensure industry-leading performance and reliability for power management solutions. Key Responsibilities － Device Development: Lead the architecture design and optimization of HV devices (LDMOS, EDMOS, ESD) on 180nm to 55nm BCD nodes. － Physics Analysis: Analyze and optimize Device Physics parameters, including BV, Rdson, SOA, and reliability (HCI/NBTI). － Simulation & Modeling: Utilize TCAD for 2D/3D process and device simulations to accelerate development cycles. － Device Verification: Define verification plans and execute statistical analysis using JMP for DOE and WAT data. － Design Integration: Work within Cadence environments for layout review and test structure design. － Cross-functional Collaboration: Partner with PI and PE teams to resolve yield, reliability, and manufacturing bottlenecks. Required Qualifications － Experience: Master‘s or Ph.D. in EE, Physics, or related field with 10+ years of semiconductor industry experience. － Technical Expertise: 1. Profound knowledge of Device Architecture and Device Physics. 2. Hands-on experience in 180nm to 55nm BCD process nodes. － Tools: 1. Expertise in TCAD (Sentaurus / Silvaco). 2. Expertise in JMP for statistical data analysis. 3. Proficiency in Cadence (Layout/Virtuoso). Preferred Qualifications (Plus) － Advanced Power Devices: Experience with GaN, SiC, or IGBT development. － Silicon Photonics: Knowledge of Photonics integration and device physics. － Domain Knowledge: 1. Process Integration (PI): Understanding of mask flow and doping profiles. 2. Product Engineering (PE): Experience in CP/FT data correlation and yield enhancement. Competencies － Accountability: Strong ownership of project milestones and outcomes. － Critical Thinking: Ability to identify root causes in complex device failures. － Interpersonal Skills: Effective communication across design and foundry teams. － Data-driven: Committed to objective decision-making through rigorous data analysis.

***Please upload English resume onto our official platform: https://reurl.cc/9WEqOV NXP Semiconductors enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets. Built on more than 60 years of combined experience and expertise, the company has 45,000 employees in more than 35 countries. Opportunity Join a world class team working on state of the art Tier 1 automotive products. NXP‘s Highly Profitable Business Line Advanced Power Solutions is seeking experienced Mobile Power Analog Designers. We engage directly with the most visible and successful mobile companies. Site Job Description Working in the Power Delivery group of the Advanced Power Solutions business line, candidate will be part of a team developing fast charging and power delivery solutions for mobile applications. Task and responsibilities - Responsible for technical executions from block design, verification, and validation for mixed signal integrated circuits, Guarantee the technical deliverables of his jobs in terms of quality and performance; - This includes system definition, block architecture, circuit design, simulation and layout. All aspects require good engineering skills together with analysis, creativity, collaboration and customer interaction. - Must have strong expertise in analog design theory and device physics, and be capable of applying these to original and novel techniques that can provide significant value. - Write articles for technical publications and conferences, and provide email and phone support for assigned products. - Documentation for design reviews and design notes, layout guidance, and other cell design activities. - Our work culture encourages engineering innovation and creativity. Engineers are expected to file patents, publish papers or technical articles and to maintain awareness of current technical developments. Design engineers are part of a team and interact globally and locally with customers, design partners, product, test and packaging engineers, program management, quality, and business teams. Qualifications - Candidate needs to hold a minimum of a B.S. degree in electrical engineering. M.S. degree is preferred. - At least 10 years direct experience designing analog and mixed-signal transistor level circuitry for power management applications. - Ability to design traditional analog MOS and BJT circuits such as bandgap references, amplifiers, oscillators, detection circuits, linear LDO and switching regulators. - Ability to design multiphase DC-DC switching converter and experienced in current balance circuit. - Knowledge in digital controlled loop design. - Other desirable skills include experience with mixed-signal design tools and flow, reading and writing Verilog AMS models.

The key areas of responsibility of the jobholder are: - Collaborate closely with foundries, NXP technology teams, and business lines to qualify and release advanced FinFET processes. - Provide technical leadership in semiconductor device physics, especially in FinFET architecture and behavior. - Interface with internal and external stakeholders on critical development and transfer projects. - Lead and steer projects to meet timelines and business objectives. - Make key decisions on process integration, balancing technical, logistical, and strategic factors. - Support NTI process transfers within foundries and NXP joint ventures Requirements / preferences: - Bachelor‘s or Master‘s degree in Electrical Engineering, Physics, or related field. - Minimum 10 years of experience in semiconductor device engineering, with a strong focus on advanced logic/RF devices. - Proven hands-on experience with HKMG and FinFET technologies in production or development environments. - Deep understanding of semiconductor device physics, especially HKMG and FinFET. - Strong analytical skills in yield enhancement and electrical data analysis. - Fluent in English and Mandarin. - Demonstrated leadership in development, transfer, or ramp-up projects. - Excellent communication and influencing skills. - Proactive, pragmatic, and results-driven mindset. - Experience working with foundries and leveraging external manufacturing capabilities .

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