交大專區

Our team‘s mission is to leverage next-generation technologies to enhance productivity in MediaTek‘s various processes. This technical position requires a combination of knowledge in IC design and expertise in machine learning/generative AI to identify and define opportunities, design feasible and stable solutions, and improve processes to enhance product quality. We are looking for engineers and data scientists who are passionate about introducing new ideas from diverse fields, enjoy working with complex data, uncovering insights, and are eager to tackle challenges. As a key member of a small and versatile team, you will provide the most appropriate solutions through rapid iterations. In terms of soft skills, you need to have a proactive attitude, an open and continuously adaptive learning ability, excellent verbal and written communication skills, and the ability to collaborate across teams. In terms of hard skills, you need to have strong programming abilities, sufficient knowledge 我們團隊的使命是利用下一代技術，協助MediaTek在各研發流程中提升生產力。此職缺為技術職，需結合IC設計領域知識與機器學習技術/生成式AI，識別並定義機會點，設計可行且穩定的解決方案，以改善研發流程並提升產品品質。 我們正在尋找熱衷於從多元領域引入新想法的工程師及數據科學家，喜歡處理複雜數據、發現洞見，並樂於挑戰困難。作為一個小而多才多藝的團隊關鍵成員，你將以快速迭代的方式提供最適當的解決方案。 在軟技能方面，你需要具備主動積極的心態、開放且持續調整的學習能力、良好的口頭與書面溝通技巧，以及跨團隊協作的能力。硬技能方面，你需要有良好的程式撰寫能力，對機器學習有足夠認知，能與團隊成員合作，並有機會與全球的合作單位有效展開協作。

1. CPU功耗分析 (設計 vs. 量測), 確保CPU功耗體質 2. CPU最大電流分析 (設計 vs. 量測), 驗證過電流保護機制確保系統穩定性 3. PMIC+PDN+CPU 功耗效率優化 1. CPU power pre-silicon vs. post-silicon correlation. Ensure CPU power quality 2. CPU max. current pre-silicon vs. post-silicon correlation. Validate max. current protection technique for system stability 3. PMIC+PDN+CPU power efficient optimization

28nm及以下先進製程(含FinFET) IO電路和ESD防護設計, 工作內容包含 (1) GPIO電路設計(包含ESD/LU防護) (2) 特殊應用IO (SD3.0/SIM card/eMMC等)電路設計(包含ESD/L防護) (3) 高速IO和特殊應用IO在事業部專案上展開和執行 - Advance node (28nm and beyond, including FetFET) IO circuitry and ESD protection design covering fields for (a) General purpose IO circuit design (with ESD/LU protection) (b) Specialty IO (SD3.0/SIM card/eMMC etc.) circuit design (with ESD/LU protection) (c) Project related implementation for high speed/specialty IO Interface - High speed IO, specialty IO circuit design, ESD protection circuit design and simulation. Work with project leader, layout, packaging and system engineers to meet design and system specifications. Work with IO library modeling, characterization teams closely for IP release.

1. IC功能驗證 2. IC韌體撰寫(C語言) 3. 協助CSA(Customer SA)/客戶解決問題

1. 具備先進製程SoC 晶片 top flow 的專業知識。 2. Advance CTS design 3. 開發先進制程的 Power Mesh 經驗。

1. Work on 7nm~3nm physical design implementation, methodology, and sign-off 2. Perform floorplan, clock planning, place and route, timing closure, ECO, IR signoff, and physical verification 3. Manage schedule, resolve design and flow issues, drive methodologies and execution

1. IC 整合 2. Package/Floorplan 整合

Do you want to be part of a smart and passionate team of researchers, advancing artificial intelligence to the next level of end-user experience in their daily lives? MediaTek Research Taiwan is seeking driven and brilliant young students to join our efforts by providing Internship placements. We are currently working on Natural Language Processing, AI for Chip Design and more! We hope you can join us as we embark on the a journey from research to product! The ideal candidate is open-minded, passionate about realizing AI in practical use cases, and looks forward to cutting-edge challenging problems. • You have experience on Frontend/Backend/Full-Stack Web programming • You have basic understanding of the foundations and engineering aspects of AI, hands on experience with machine Learning frameworks (PyTorch, Tensorflow, JAX) is a plus. • You are a proficient scientific communicator. You are committed to your goals and working in a team. • You are eager to tackle real-world applications with state of the art methodologies. We want your ideas to shine! As an Engineering Intern in our team, you will collaborate with our researchers and worldwide colleagues and develop applications and algorithms that make a real difference in everyday devices. Your developments would significantly enhance the experience of numerous end users across our product range.

1.自動化5G環境模擬工具開發 2.protocol 或 效能問題的分析與模擬系統設計 3. 5G system 系統驗證 與modem效能benchmark 與 系統穩定性監控 4.對 IOT/field test and protocol debug 有相關經驗尤佳

1. 智慧型手機系統記憶體與儲存: DRAM (LPDDR4, LPDDR5, LPDDR6...) / Storage (UFS, eMMC...)驗証 2. 系統驗証方法研究與開發 3. 規畫驗証計畫 (test plan, test case) 4. 自動化測試環境開發

1. 進行射頻系統性能驗證工作，確保測試結果符合測試規範需求。 2. 與演算法及軟體部門合作開發與PA相關的省電技術。 3. 使用DPD技術改善PA的線性度與效率。 4. 支持重要客戶完成工廠校準時間的優化工作。 5. 撰寫高品質的技術文檔，並交給客戶支援單位以執行客戶支持。

1. AI SW task management and SW strategy development 2. Software developments of AI/GAI and its applications on automotive and Smart home products 3. OEM engagement for new application exploration 1. 負責AI SW任務管理與SW策略制定 2. 負責AI/GAI軟體開發及其在汽車、智慧家庭產品的應用 3. 參與OEM新應用探索

使用者體驗指標定義和品質保證，使用者體驗驗證工程師。 負責定義旗艦/高端/中端/低端的使用者體驗指標，預估未來用戶體驗發展，確保產品具競爭力。分析競品與客戶對接討論，開發測試手法與測試用例。 有Android phone 使用者體驗/功耗性能 設計或測試經驗，尤其有手機大廠相關測試規劃經驗者，將優先考慮。

1) 數據庫設計：參與數據庫的設計和架構規劃，以滿足業務需求。 故障排除：解決數據庫運行中的問題，並提供技術支持。 2) 數據庫維運：負責數據庫的日常維護工作，包括監控、備份、恢復和升級。 3) 性能監控：監控數據庫系統的性能，並進行必要的優化。 4) 合規性與安全：確保數據庫遵守相關法規和公司政策，並保護數據不受未授權訪問。

The candidate will design, supervise layout, help characterize transceiver front-end circuits for WiFi and Bluetooth production.

In a flexible and supportive environment, one of your major responsibilities is to push the state of the art of learning theory. Furthermore, through collaboration with worldwide colleagues, you will have the rare opportunity to apply advanced Deep Learning theories to novel application areas such as AI-designed IC and General Intelligence Conversation. We welcome all ML/DL backgrounds, including computer vision, speech and NLP, and robotics.

1. 應用正規方法在硬體或軟體的驗證上 2. 正規方法文獻回顧與論文分析以改善目前的使用限制 3. 規劃安排跨部門的技術教學與討論課程 4. 相關的文件撰寫與審查修改 5. 此職缺之薪資起始水準為NT$29500~50000，但仍會視人選之學經歷背景調整核定。

• 負責高速SerDes的開發，包括韌體設計與演算法實現、IC功能驗證、系統效能優化以及客戶支援（熟悉架構、韌體、除錯、優化及測試相關工作） • 開發自動化驗證（使用C++、Python、C#和MATLAB） • 與類比/數位團隊合作，從原型設計到量產共同開發晶片 •協助客戶設計導入並支援量產

IC 測試開發工程師 負責高速數位、類比晶片測試程式開發(AP/compu AI/ASIC/…)，產品特性異常分析與改善 新產品導入量產與生產良率測試時間優化 俱獨立帶產品作業為佳。

1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation