交大專區

影像編碼器硬體架構規劃與電路設計實現

Product 2.5D/3D/3.5D heterogeneous package development, LPDDR/HBM/IPM development for advanced package, product memory roadmap, package memory architecture , customized HBM development

We are looking for AI hardware architect/designer to join our team and play a pivotal role in designing, developing, and optimizing architecture of the neural processing unit (NPU). As an architect/designer, you will be responsible for creating innovative hardware and software solutions that meet the performance, scalability, and efficiency requirements of our advanced NPU environment. The ideal candidate will have a strong background in computer architecture, microarchitecture, and digital design, as well as experience with industry-standard tools and methodologies. You are expected to transform novel ideas into practical proposals for future NPU products, and vet the proposals via prototyping. Extensive knowledge in compiler and operating system is a plus. International travel may be required.

Fully accountable with the team to deliver highly competitive ARM based CPU IP. Implementation skill required ranged from RTL, synthesis, DFT, Floorplan, Placement, CTS, Routing, Timing Closure, and physical verification.

1. ARM Mali GPU 性能, 功耗優化與穩定性相關問題解決 2. Linux kernel driver and microprocessor firmware 開發, spec reading. 3. Android系統, 圖形知識, 及相關的driver 程式開發

1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: * Scan chain insertion & ATPG pattern generation * Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) * Diagnosis to help manufacture process improvement 2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: * PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation * Develop & integrate DFT-related RTL design modules to test chip

對於DFT晶片測試有興趣者，特別是 Automotive low DPPM DFT 以及 RISC-V DFT 領域， 負責開發與實行DFT流程，以降低測試成本、提高產品品質為目的 As a member of DFT engineering team, the candidate will develop methodologies and implement DFT for pre/post-silicon DFT flow and contribute to Automotive/RISC-V product test quality. Work with senior engineers across disciplines (DE, IMP, PE, TE) to meet low cost and high quality testing

1.參與 Linux 芯片移植，系統相關開發，調整和測試。 2.解決Linux 系統穩定性和性能問題。 3.與3rd party MW 合作 Linux 系統整合。 4.協助其他團隊解決 Linux 系統層相關問題。 5.客戶支持.

1. Design and RTL implementation of SoC debug modules 2. Integration and verification of debug components (e.g., trace, monitor, access port) 3. Debug signal capture, trace, and analysis for SoC platforms 4. Support SoC debug flow and issue localization 5. Collaborate with cross-functional teams to optimize debug performance 6. Documentation and test specification for SoC debug features 7. Location: Taipei/Hsinchu

Requirements Elicitation, Requirements Analysis, and Architectural Design - Analyze product requirements from customer - Discuss the expectations and requests with customer - Agree or reject the requirements - Make architectural design proposals

• Linux/Android 系統軟體的設計、開發、整合、測試、除錯、交付及維護。 • Linux/Android BSP (Board Support Package) 的訂製、開發、整合、測試、除錯、交付及維護。 • 將Linux/Android移植到不同的硬體平台(FPGA, real chip, …)及bring up。 • 識別、分析及解決系統問題。 • 進行系統效能分析、優化系統效能與資源配置。 • 軟體開發相關文件的建立。 • 與世界各地進行跨部門及跨公司的合作。

負責 SoC／系統層級的效能與功耗分析、優化。 與硬體、韌體、軟體、架構等團隊合作，推動效能與功耗改善方案。 針對系統瓶頸進行深入分析，提出有效的優化解決方案。 參與 DVFS、低功耗設計、系統資源管理等技術的開發與調教。 針對 Windows 平台，優化 Windows PPM（Processor Power Management）設定，提升系統效能與功耗表現。 分析並調教 Windows Power Management 相關設定，確保系統在各種使用情境下達到最佳效能與最低功耗。 撰寫技術報告與文件，並提供內部團隊及客戶技術支援。

1. 藍芽/802.15.4 通訊協定軟體、驅動程式、測試工具開發與驗證 2. 藍芽/802.15.4 客戶專案功能開發與支持

1. 在AI產品上負責Memory IP上相關開發、熟悉軟/韌體、除錯、優化及測試等工作項目。 2. 負責IP SDK 與診斷程式開發。 3. 協同團隊共同完成系統雛型建立、驗證及性能優化與調適。 4. 達成客戶端產品導入，並支援產品量產工作。

1. Serdes/High speed interface related PHYD IP architecture planning. 2. Serdes/High speed interface related PHYD IP RTL coding. 3. Serdes/High speed interface related PHYD IP front-end and back-end integration. 4. Co-work with MAC design team and DV team for IP verification. 5. Co-work with Analog design team for PHY co-simulation.

1. 設計、開發和維護多媒體應用程式，包括但不限於Video playback, Image, playback。 2. 開發和優化 Android 平台上的多媒體應用程式，確保其性能和穩定性。 3. 開發和維護嵌入式系統上的多媒體應用程式，確保其在資源受限環境中的高效運行。 4. 與設計師、產品經理和其他工程師合作，確保多媒體應用程式的功能和使用者體驗達到高標準。 5. 進行多媒體技術的研究和創新，持續改進現有產品的性能和功能。 6. 撰寫和維護技術文件，確保程式碼的可讀性和可維護性。 7. 參與產品測試和除錯，確保產品的穩定性和可靠性。 8. 依據市場需求和用戶反饋，進行產品的優化和升級。

1. HSI IP development 2. Short term: Help integration of on-going project including QC. 3. Long term: Deep learn into 3rd party HSI IP. Know the detailed spec of PCIe/UCIE/USB4 and able to co-work with DV.

1. Processor core, cache and peripheral verification 2. Verification flow and methodology 3. Advanced tool and verification technology survey

1. WiFi/BT 電路系統分析、IC驗證除錯、公板製作、數據蒐集及分析 2. PCB公版設計, 除錯 3. EMI 防治對策 4. 高速數位介面應用及除錯 5. 客戶支持

1. Conducting quality check procedures to ensure high-quality deliverables.​ 2. Coordinating product quality issue to provide best-fit disposition for quality event impact material.​ 3. Ensure lessons learned from prior projects are used to improve quality management process.​ 4. Customer quality communication and RMA/FA management.