交大專區

1. 設計 5G 和新一代多模通訊協定架構，開發具有超高數據速率，低延遲和出色用戶體驗的通訊協定軟體，以廣泛運用在手機、人工智慧物聯網和車用系統上 2. 與全球領先網路設備商 (如: 華為、中興、愛立信、諾基亞) 進行互操作開發測試，以早期達成產品相容性目標 3. 開發領先全球的網路運營商功能，與世界頂尖客戶合作，實現新一代出色的移動通訊產品

Looking for 4G/5G Modem System Engineer with technical depth on Protocol/L1 and technical breadth on modem system, with cross-site collaboration and technical communication skill, capable of direct support tier-1 customers and projects and technical deep dive with customers, in charge of customer requirement analysis and customer feature development coordination, willing to proactively initiate tasks for continuous improvements on productivity and quality and modem competitiveness for the long term.

1. 負責4/5G軟體專案管理的相關工作，包含專案需求評估、規劃與執行，專案相關工作之溝通協調，客戶夥伴關係，並提供專案技術支援客戶專案的管理追蹤與規劃。 2. 協助客戶專案完成產品入庫 (4G/5G modem protocol/middleware/system)。 3. 負責與運營商, 局端設備商, 儀表商, 認證實驗室合作 5G MD 有關的商務與專案進行。 4. 制定客戶專案支持的技術品質規範。 5. 追管 5G ThinMD 營銷推廣有關的問題與效能改進。 6. 開發以上業務相關的支援工具與驗證工具。

1.開發多模WCDMA/LTE/NR 基頻物理層接收機 2.實現在DSP處理器中的無線通訊信號處理算法 3.實現和優化 ASIP/ DSP架構的數位通訊系統

1. 開發 5G專案高速Serdes技術,負責開發相關的軟韌體設計. 2. 與硬體同仁合作設計出HW engine的規格,並負責撰寫相關driver.

* Performance and power profiling, optimizing in Android graphic modules. * Design and develop micro bench for performance analysis * Design and develop Android graphic features and GPU system features to improve performance and power efficiency. 【Better】 * Understand customer requirements, generate software specifications and implement software features * Work closely with GPU system engineers and game developers to analyze game core technologies performance and quality as it applies to GPU hardware * Design and lead the development microbench for performance analysis * Design and lead the development of Android graphic system and GPU system features to improve performance and power efficiency.

1. 透過資料分析方法 完成資訊安全風險評估與查核 2. 提供環境架構與程序改善建議

我們想要找熱愛 AI 持續不斷學習新技術或打比賽, 聚焦長遠目標, 並且真正動手解決問題的人. 歡迎加入我們. We are looking for experienced Machine Learning/Deep Learning engineers. This is a technical role, and it requires a high willingness to learn state-of-the-art AI techniques and a skill to apply AI techniques to business applications/processes. This job opening encompasses a wide range of end-to-end ML pipeline activities, including framing AI problems, data collection/preprocess/exploration, model development/evaluation, model deployment/monitor.

1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: * Scan chain insertion & ATPG pattern generation * Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) * Diagnosis to help manufacture process improvement 2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: * PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation * Develop & integrate DFT-related RTL design modules to test chip

Constraint 流程設計, 與軟體廠商, 內部設計自動化團隊, IC design 團隊合作並設計timing constraint和netlist data-in 的自動化流程. . 依據IC設計需求, 開發並維護相關 components and scripts. . 協助支援 design teams on flow infrastructures, SDC/Netlist sanity and consistency verification, related tools, and flows. . 新功能的研究開發來改善IC設計流程的效率以及品質.

1. 先進製程技術製程開發 2. 先進封裝技術開發

1.熟悉Windows下的開發環境 2.熟悉GCC/G++ 與相關Tool Chain 3.熟悉不同平台的cross compilar 4.熟悉WiFi driver或Windows device driver的撰寫

1. 先進製程技術製程開發 2. 先進封裝技術開發

1.Physical design RC extraction flow development and build up. 2.EDA collaboration to enhance RC extraction methodology 3.FOM RC analysis to propose DTCO opportunities

Mediatek Analog Design and Circuit Technology (ADCT) is currently seeking experienced analog circuit designers to develop high speed, high performance and low power analog/mixed-signal circuits and PMU for wireless cellular phones, wireless LANs, smart home, wide-area networks, high performance computing, AI, IoT, automotive and ASIC. This role will include circuit analysis, design, simulation and test using innovative architectures to deliver best-in-class performance. Of particular importance will be design experience of involving at least one or more topics in the following: 1. High speed SerDes circuit design, like CTLE, CDR, DFE, PLL, DLL and TX Driver. 2. High efficient power management integrated circuit (PMIC) design, like LDO, DC-DC converter and envelop tracking (ET) power supply modulator. 3. High speed data converters, like SAR ADC, pipelined ADC, interleaved ADC, hybrid ADC, current steering DAC and switch-capacitor DAC‘s. 4. High speed DDR/LPDDR analog PHY circuit design and verification. 5. High resolution data converter, like noise shaping CT/DT DSM ADC/DAC and incremental ADC. 6. Ethernet, Bio-medical and Sensor Analog Front Ends. 7. Audio Class-AB/D amplifiers, PGA, filter, oscillators and temperature sensor. 8. Ultra-low power analog/mixed-signal circuits design for IoT. 9. Analog circuit and chip integration of Serdes, PLL, Data Converter, PMU and PMIC. 10. Work Location : HsinChu/Taipei/ChuPei

High speed SerDes/PLL design

MTK電源管理部門設計設計電源管理IC及電源管理單元以滿足各式各樣智慧手機, IOT, 車用, 以及ASIC的需求. 職缺包含: 1. DC-DC 轉換器 2. 線性電壓調節器 3. 切換電壓調節器

負責無線通訊射頻收發器IC內的類比基頻電路設計，其中包含了: 1. 類比放大器設計 2. 無電容低壓差穩壓器設計，或是bandgap電壓源設計 3. 混合訊號電路設計，包含了晶體震盪器或是相關的時序產生電路，例如鎖相迴路(PLL) Responsible for analog baseband circuit design in wireless transceiver RFIC. 1. Analog opamp, filter and TIA design 2. Foundation analog IP design, including Capless LDO, bandgap, temperature sensor. 3. Mixed mode data converter design, including over-sampling and Nyquist rate ADCs and DACs. 4. Mixed mode timing circuit design, including crystal oscillator and related timing generation circuitry, such as phase-locked loop (PLL)

高速類比電路與記憶體介面類比電路設計

1) 訂定 5G 通訊系統使用的CPU及系統架構 2) 開發RTOS、記憶體管理等系統相關服務 3) 為系統效能評估開發系統化分析法、CPU及平台模擬器 4) 分析軟體行為並增進系統效能 5) 開發CPU及系統相關的驅動程式及開機流程 6) 開發自動診斷系統問題的工具 7) 藉由系統或流程行為的大數據分析, 引導團隊改善方向