交大專區

1. 5G NR通訊系統分析 (a) 5G NR實體層規格及流程驗證 (b) 基頻演算法設計驗證及訊號分析 (c) 整體系統效能驗證與流程分析 2. 5G NR通訊平台開發 (a) 內部測試平台開發 (基本功能,算法) (b) 系統性能以及RRM分析平台開發

1. 設計 5G/B5G 和新一代多模通訊協定架構，開發具有超高數據速率、低延遲和出色用戶體驗的通訊協定軟體，以廣泛運用在手機、人工智慧物聯網和車用系統上。 2. 與全球領先網路設備商（如：華為、中興、愛立信、諾基亞）進行互操作開發測試，以早期達成產品相容性目標。 3. 開發領先全球的網路運營商功能，與世界頂尖客戶合作，實現新一代出色的移動通訊產品。

1.數位電路設計 2.多媒體架構與電路設計 3.多媒體系統整合 1.Digital IC Design 2.Multimedia Architecture and Design 3.Multimedia System Integration

1. Interpret customers’ functional safety requirements into SoC requirements 2. Define the SoC level architectures to meet functional safety requirements 3. Communicate and coordinate safety designs with cross-function IP teams 4. Perform system safety analysis (ex: FMEDA)

1. Interpret customers’ functional safety requirements 2. Derive functional and technical safety concepts from functional safety requirements 3. Develop and review the safety IP design 4. Communicate and coordinate safety designs with IP teams 5. Perform system safety analysis (ex: FMEDA)

解讀客戶的網絡安全需求 從網絡安全需求中推導出功能和安全概念 制定和審查安全系統架構 與 IP 團隊和客戶溝通和協調安全設計 執行系統安全分析（例如：TARA）

1. Develop high speed interface subsystem architecture and integrate PCIe, MIPI, or DisplayPort subsystem. 2. Develop security and FuSa function on PCIe, MIPI, or DisplayPor degital circuit.

Are you an experienced IC design expert/architect with a passion for pushing the boundaries of technology? MediaTek, a leading semiconductor company, is currently seeking talented professionals to join our team! Work location: Hsinchu/Taipei/San Diego/San Jose

1. Develop and implement tailored DRAM controller/PHY solutions for automotive applications. Validate functionality, improve design revisions and meet performance targets as well as system requirements. 2. Perform rigorous design testing and debugging in automotive environments. Troubleshoot and propose solutions for any issues occurring in post-silicon validation. 3. System Level Cache Design & Implementation: Design and implement system level cache strategies to optimize performance and efficiency across our product range. 4. System-Level Understanding: Exhibit a system-level understanding of performance trade-offs, system architecture, memory subsystems, and various memory technologies (DDR3, DDR4, DDR5, LPDDR3, LPDDR4, LPDDR5 etc.). 5 . Ensure that all designs comply with automotive industry standards and regulations, such as ISO 26262 and Automotive SPICE.

1. Create power models and simulate software design for power optimization to achieve world-class low power consumption. 2. Design software throttling mechanisms and corresponding software/hardware 3. Collaborate with IP, SoC, and software teams to analyze system power consumption, with a focus on automotive scenarios, and drive the evolution of SoC low power hardware and software architecture. 4. Evaluate different architecture and IP options during product specification definition, analyze system power experience, and generate power dashboards to support product decision-making. 5.Conduct or assist in power measurement and calibration against power model estimations; analyze PMIC/Power rail design, SoC power states, and data-path power, and propose SoC design optimization solutions. 6. Understand related requirements and propose system power management framework. Elaborate power on sequence for key scenario in early stage for new projects.

1.Develop fault simulation flow for function safety. 2.Deploy fault simulation for safety IPs 3.Co-work with IP design verification teams to achieve pre-silicon verification of hardware safety requirements

1. 開發設計 Security HW IP 2. 協助 HW IP 驗證 3. 執行 IC 設計整合流程

1. Smartphone (Low Power Architect) and Automotive (Power control) 2. Not a management position 3. Short term:digital IP design/integration of power control IPs with zero bugs Long term:define power control arch for smartphone or automotive products develop new tech for power control

1.Collect the safety design spec for the camera/display/audio subsystem and build the execution plan for safety design verification 2.Co-work with IP design verification teams to achieve pre-silicon verification of hardware safety requirements 3.Deploy fault simulation for safety IPs

We are seeking a highly skilled DFT/DFM Engineer to join our automotive ADAS SoC chip design team. The successful candidate will be responsible for DFT and DFM methodologies, design, and implementation for our advanced automotive system-on-chip (SoC) designs. The candidate will also collaborate with the design and layout teams to integrate DFT/DFM requirements. • SoC testing architecture design • Support project NPI(new product introduction) to MP(mass production) (test program development, coverage enhancement, yield improvement, cost reduction) • Cowork w/ IP, test engineer, process team, board design to fulfill CP/FT/SLT test requirement.

1. Architecture design and RTL implementation for Smartphone and automotive chip 2. Smartphone SoC and mobile computing platform design. 3. System bus and high speed interface designs

1. 開發用於模擬手機/平板/車用SOC功率消耗的平台 2. 協助IP, SOC與軟體團隊，維護用於功耗分析的資料庫，開發相關工具以輔助跨團隊的資訊整合 3. 優化系統效能，輔佐系統功耗相關決策的進行

1. 開發基於虛擬機的軟體平台和虛擬機管理技術。 2. 職責包括軟體功能和驅動程式的開發，以及硬體設計的整合。 3. 與其他軟體團隊、第三方和客戶的工程師進行合作。

車用相關 IC 設計流程專家。 具備車用SoC/ASIC RTL2GDS 實做經驗和問題解決能力。 同時具備車用IC設計流程中 Safety mechanism 的專業知識。

1. Architecture design and RTL implementation of Automotive/Smartphone chipset 2. SoC system power and performance analysis 3. SoC system bus and memory subsystem design, integration, and modeling 4. SoC low power design, integration, and modeling 5. SoC functional safety analysis, design, integration, and modeling 6. SoC cyber security analysis, design, integration, and modeling