清大專區
1.Smartphone SLT軟體整合(C/Android) 2.Smartphone SLT量產測試自動化流程改善
1. 數位晶片設計流程與整合 2. 熟悉低功耗的設計流程(和架構)
1. FR-1 平台天線解決方案開發與驗證 2. 使用EM模擬軟體進行天線解決方案性能評估 3. 與跨部門團隊合作開發新MTK平台天線解決方案
1. 規劃量產測試以及量產functin pattern porting 2. 測試以及驗證IC功能,性能,以及功耗等等相關測試 3. 分析測試資料以及釐清相關測試的問題,並分析良率問題以及良率改善建議 4. AVS low power的設計
1.Propose design verification plan and do the execution based on IP and system HW architecture/application 2.Develop design verification environment 3.Develop required verification methodology and adopt into project
CPU Physical design, - floorplanning, - timing closure - Physical verficiation - DFT
5G modem系統驗證規劃, 資源安排與專案管理
1. Perform pre-silicon and post-silicon correlation and modeling related to adaptive voltage scaling and on-die sensor 2. Develop and improve post-silicon testing methodologies related to adaptive voltage scaling and on-die sensor
1. CPU功耗分析 (設計 vs. 量測), 確保CPU功耗體質 2. CPU最大電流分析 (設計 vs. 量測), 驗證過電流保護機制確保系統穩定性 3. PMIC+PDN+CPU 功耗效率優化 1. CPU power pre-silicon vs. post-silicon correlation. Ensure CPU power quality 2. CPU max. current pre-silicon vs. post-silicon correlation. Validate max. current protection technique for system stability 3. PMIC+PDN+CPU power efficient optimization
28nm及以下先進製程(含FinFET) IO電路和ESD防護設計, 工作內容包含 (1) GPIO電路設計(包含ESD/LU防護) (2) 特殊應用IO (SD3.0/SIM card/eMMC等)電路設計(包含ESD/L防護) (3) 高速IO和特殊應用IO在事業部專案上展開和執行 - Advance node (28nm and beyond, including FetFET) IO circuitry and ESD protection design covering fields for (a) General purpose IO circuit design (with ESD/LU protection) (b) Specialty IO (SD3.0/SIM card/eMMC etc.) circuit design (with ESD/LU protection) (c) Project related implementation for high speed/specialty IO Interface - High speed IO, specialty IO circuit design, ESD protection circuit design and simulation. Work with project leader, layout, packaging and system engineers to meet design and system specifications. Work with IO library modeling, characterization teams closely for IP release.
1. 具備先進製程SoC 晶片 top flow 的專業知識。 2. Advance CTS design 3. 開發先進制程的 Power Mesh 經驗。
1. Work on 7nm~3nm physical design implementation, methodology, and sign-off 2. Perform floorplan, clock planning, place and route, timing closure, ECO, IR signoff, and physical verification 3. Manage schedule, resolve design and flow issues, drive methodologies and execution
1. IC 整合 2. Package/Floorplan 整合
1. 5G 物理層/通訊協定規格及流程驗證 2. 熟悉5G L1 phy, 通訊協定, IMS, GCF/PTCRB, RF conformance , 並設計測項保證手機系統品質及效能 3. 5G R16 and later features and later new feature verification 4. Maximum throughput 測項開發及驗證 5. 5G 系統環境模擬及測項開發 6. 與營運商或基地台廠商執行互操作聯調/互操作測試/場測 7. 自動化工具開發及大數據通訊協定分析
1. 智慧型手機系統記憶體與儲存: DRAM (LPDDR4, LPDDR5, LPDDR6...) / Storage (UFS, eMMC...)驗証 2. 系統驗証方法研究與開發 3. 規畫驗証計畫 (test plan, test case) 4. 自動化測試環境開發
1. Package design and planning of various product. 2. Design & layout of BGA substrate. 3. Co-work with package houses for package design 4. Development of advanced package technology. 5. Package design platform development.
1) 數據庫設計:參與數據庫的設計和架構規劃,以滿足業務需求。 故障排除:解決數據庫運行中的問題,並提供技術支持。 2) 數據庫維運:負責數據庫的日常維護工作,包括監控、備份、恢復和升級。 3) 性能監控:監控數據庫系統的性能,並進行必要的優化。 4) 合規性與安全:確保數據庫遵守相關法規和公司政策,並保護數據不受未授權訪問。
1. 應用正規方法在硬體或軟體的驗證上 2. 正規方法文獻回顧與論文分析以改善目前的使用限制 3. 規劃安排跨部門的技術教學與討論課程 4. 相關的文件撰寫與審查修改
• Plan Wndows/UEFI software and system development plan • Analyze and benchmark SW key performance factors • Optimize, benchmark and profile Windows on ARM platforms • Familiar with OEM ecosystem
1. 先進製程技術製程開發 2. 先進封裝技術開發