清大專區

Machine Learning - Architect/Researcher/Engineer - Accelerator, Deployment and Infrastructure [Overview] MediaTek HQ is looking for Machine Learning Architect, Researcher, or Engineer who is passionate about System Platform, Software Engineering, and Applied Machine Learning (including Deep Learning and AI). This position is within MediaTek’s AI Group. This R&D role offers a dynamic environment, hands-on learning, and a unique opportunity to develop both Infrastructures and Accelerators for state-of-the-art (SOTA) machine learning, as well as to build applications utilizing SOTA machine learning techniques. You will join a team devoted to developing and deploying cutting-edge machine learning and deep learning algorithms, optimized for MediaTek’s NPU—and, conversely, optimizing our NPU for advanced ML/DL workloads.

AI 處理器系統軟體工程師 負責 MediaTek AI 處理器系統軟體的開發，主要職責包括： 1. 開發與優化 AI 處理器的 Linux 核心驅動程式及韌體，以最大化系統效能。 2. 在早期開發階段設計 NPUSYS 架構並實現相關軟體。

1. 數位電路設計 2. 多媒體電路設計 3. 系統整合

1. 產品品質問題電性 / 物性分析 2. 產品測試機台操作和測試分析 3. 跨部門溝通以分析產品故障真因

• 此職位屬於聯發科技modem客戶工程團隊，該團隊任務為與內部研發團隊合作，支援全球一流智能手機客戶的無線通訊技術(包括LTE、5G Sub-6GHz和5G mmWave技術)。 • 此職位主要職責在與客戶合作過程中帶領技術討論，並與內外部不同團隊合作，共同討論並解決客戶問題、滿足需求。 • 此職位需具備深入研究技術問題、了解客戶需求分析與功能開發的能力及良好應變能力。 • This is an exciting role in the MediaTek wireless technology group within the modem customer engineering team working with internal R&D team and support tier-1 global smartphone customers in wireless technologies (LTE, 5G Sub-6GHz, and 5G mmWave technologies) • You will play a key technical role in working with internal and external stakeholders to lead technical discussion and drive customer issues to resolution. • This is a dynamic position that will interact and collaborate with different teams and site location. • Ability to deep dive technical issues, understand customer requirement analysis and feature development. Looking for 4G/5G Modem Protocol / System Engineer with technical breadth in the protocol stack.

• Work with the architecture/micro-architecture/design teams to do white box testing. • Create testplans based on the micro-architecture document with the design team. • Build, maintain and upgrade testbenches and their components using UVM-based methods. • Build custom BFMs for co-sim based module level verification. • Add assertions and checkers to facilitate verification. • Work with the design team to do module level formal verification. • Create controlled random testcases. Pre-debug and provide debug reports. • Check functional coverage and code coverage.

1. 測試機台操作與管理. 2. 產品品質問題電性分析 3. 跨部門溝通以分析產品故障真因

先進封裝技術開發 1. 先進新產品導入技術開發 (新產片試產規劃, DRC/DRM檢驗, DOE及良率改善規劃, 量產區間及良率分析) 2. 熟悉先進chiplet及3DIC封裝技術開發 3. 晶圓級與面板級先進封裝結構設計

1. Package design and planning of various product. 2. Design & layout of BGA substrate. 3. Co-work with package houses for package design 4. Development of advanced package technology. 5. Package design platform development.

1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation

We are looking for experienced ML/DL candidates to join our team of PhD-level researchers and interns. The ideal candidate is open-minded, passionate about pushing learning theory, and keen on the opportunity to challenging convention. In a flexible and supportive environment, one of your major responsibilities is to push the state of the art of learning theory, to obtain insights beyond mythical theories as well as to apply the right solution to novel application areas such as AI-designed IC and General Intelligence Conversation. Furthermore, you shall actively engage with worldwide colleagues and academics to nurture and build a collaborative and effective R&D environment. We welcome all ML/DL backgrounds, including computer vision, speech and NLP, and robotics.

1. 先進製程技術製程開發 2. 先進封裝技術開發

職缺說明 我們是聯發科技IT MLOps平台團隊，致力於打造高效、可擴展的MLOps平台，提升企業AI模型開發、部署與運維自動化能力。團隊積極導入最新技術並持續學習成長，尋找具備MLOps平台架構設計與實踐經驗的菁英，一同推動公司AI數據驅動轉型。 歡迎對雲端/地端AI平台、機器學習自動化與大型系統架構有熱情的你加入我們！ 工作內容： 1 規劃並設計企業級MLOps平台架構，負責專案規劃、目標訂定、技術選型與落地執行。 2 與跨部門團隊AI合作，協助把商業問題拆解為可自動化實現的AI工作流，支撐AI模型端到端生命周期管理。 3 主導平台核心模塊建置：模型訓練/部署管線、CI/CD for ML、資料流通與版本控管、模型監控與資產管理等。 4 推動企業級MLOps標準化、流程自動化與最佳實踐，優化模型運營效能、穩定性及安全性。 5 參與平台持續優化與技術創新，導入新技術·新工具如Kubeflow、MLflow、Vertex AI等，提升平台功能。 6 協助建立團隊技術文化，分享MLOps相關知識、推動內部技術培訓與交流。

Product 2.5D/3D/3.5D heterogeneous package development, LPDDR/HBM/IPM development for advanced package, product memory roadmap, package memory architecture , customized HBM development

We seek a skilled and visionary AI Computing Platform Software Planner to drive innovation and development across our AI platform products. This role requires close collaboration with leading technology partners – Google (Android OS), Microsoft (Windows) - to define, plan, and execute software features that enable advanced AI capabilities in our computing platforms. 1.Software Feature Set Planning & Decision Making 2.Execution Planning 3.Cross-Partner Collaboration 4.Platform Integration & Validation 5.Documentation & Communication

1. 開發 Android smartphone multimedia video system framework, driver and functions 2. 架構設計、分析並優化 Android smartphone multimedia video 效能 3. Video 功能驗證 4. 系統架構設計與問題分析

We are looking for candidates that can communicate complex engineering subjects effectively to cross functioning technical teams and upper management. Strong DFT and testing skills will be put to good use. Successful handling with many external teams from pre-silicon phase cross to post-silicon on advance silicon and assembly process. Key Responsibilities • Drive DFT Excellence: Define DFT architecture specifications that enhance ATE and production test environments, optimize test costs, and improve quality across future MTK ASIC product portfolios. • Product test planning capability: Manage comprehensive post-silicon flow optimization, and test deployment for new product launches • Manufacturing Integration: Serve as a key contributor within MTK’s Global Quality and Operations organization to deliver optimal manufacturing test solutions from early product conception through post-silicon validation • Design Collaboration & Quality Assurance: Partner closely with design teams to ensure accurate implementation of DFT structures and compliance with specifications.

We are looking for a DFT Engineer to define and implement DFT architectures for data center ASIC products. The role involves developing test strategies, integrating DFT features, and improving test coverage for mass production. You will work closely with design teams to ensure robust DFT solutions, yield improvement, and quality. Key Responsibilities • Develop and optimize test strategies to achieve coverage and manufacturing goals; analyze and improve test coverage. • Integrate DFT features at RTL and gate-level, supporting both top and block-level DFT planning and implementation. • Perform ATPG, fault simulation, and coverage analysis. • Collaborate with BE and PD teams to ensure DFT-friendly timing and support IR convergence in test mode. • Lead silicon bring-up and debug of test features; conduct failure and yield analysis. • Work with product teams to facilitate pattern generation, validation, and DPPM improvement.

1. 開發多模式 NR / 6G / NTN DSP 韌體： 包含狀態機（State Machine）、通道排程（Channel Scheduling）及數據機控制（Modem Control）韌體設計。 2. 在嵌入式系統中實作 OFDM 通訊訊號處理與理論。 3. 將數位通訊演算法移植或開發於專用指令集處理器（ASIP）或數位訊號處理器（DSP）架構之上。

車用無線通訊軟體開發，包含： 1. 802.11 無線網路驅動程式與韌體開發 2. Android/Linux 嵌入式系統驅動軟件開發整合 3. WLAN/Wi-Fi通訊系統協定軟件設計及開發 4. 內部跨單位與車用平台單位及世界級車廠合作開發至產品量產