清大專區
SoC測試助理: 負責MediaTek手機平板車用在系統上的測試與測試工具開發
1. 撰寫或移植裝置驅動程式 2. 撰寫硬體模組測試程式 3. 進行硬體模組測試及驗証 4. 分析系統問題 5. 分析及改善系統功粍效能
Our team‘s mission is to leverage next-generation technologies to enhance productivity in MediaTek‘s various processes. This technical position requires a combination of knowledge in IC design and expertise in machine learning/generative AI to identify and define opportunities, design feasible and stable solutions, and improve processes to enhance product quality. We are looking for engineers and data scientists who are passionate about introducing new ideas from diverse fields, enjoy working with complex data, uncovering insights, and are eager to tackle challenges. As a key member of a small and versatile team, you will provide the most appropriate solutions through rapid iterations. In terms of soft skills, you need to have a proactive attitude, an open and continuously adaptive learning ability, excellent verbal and written communication skills, and the ability to collaborate across teams. In terms of hard skills, you need to have strong programming abilities, sufficient knowledge 我們團隊的使命是利用下一代技術,協助MediaTek在各研發流程中提升生產力。此職缺為技術職,需結合IC設計領域知識與機器學習技術/生成式AI,識別並定義機會點,設計可行且穩定的解決方案,以改善研發流程並提升產品品質。 我們正在尋找熱衷於從多元領域引入新想法的工程師及數據科學家,喜歡處理複雜數據、發現洞見,並樂於挑戰困難。作為一個小而多才多藝的團隊關鍵成員,你將以快速迭代的方式提供最適當的解決方案。 在軟技能方面,你需要具備主動積極的心態、開放且持續調整的學習能力、良好的口頭與書面溝通技巧,以及跨團隊協作的能力。硬技能方面,你需要有良好的程式撰寫能力,對機器學習有足夠認知,能與團隊成員合作,並有機會與全球的合作單位有效展開協作。
1. Processor core, cache and peripheral verification 2. Verification flow and methodology 3. Advanced tool and verification technology survey
1. 規劃/設計開發板 (EVK)的規格, 電路, 以及PCB layout 2. 電源架構設計,包含制定規格和電路設計/驗證 3. 調研客戶產品需求以及競爭力分析 4. 全球客戶專案管理以及技術支持
負責新產品開發、產品製造管理、良率改善,及產品開發時的問題分析及解決。
我們正在尋找一位資深軟體品質保證工程師(Senior SQA Engineer)加入我們的團隊,負責為汽車系統提供高品質的驗證工作。您將設計並執行測試計劃,驗證系統設計和架構的需求,並協助確保系統的穩定性與效能。這個職位將有機會與全球一級供應商(Tier-1 suppliers)及車廠(OEMs)合作,參與新一代汽車系統的開發,並在一個協作且創新的工程環境中工作。 主要職責 1、為 Tier-1 Hypervisor 平台上的 Yocto Linux 和 Android Automotive OS 虛擬機(VM)制定並執行測試計劃。 2、驗證汽車平台的功能、效能及穩定性。 3、與跨部門團隊合作,定義測試範圍、驗收標準及風險管理。 4、撰寫詳細的測試報告,並提供可行的回饋以提升產品品質。
與晶圓代工廠, 電子設計自動化公司及公司內部團隊合作開發/維護 先進製程/封裝3D/2D設計套件/流程, 具備單項或多項以下經驗: 1. 益華電腦或新思科技製程設計套件開發/維護, 及品質檢測 2. 數位佈局繞線技術檔案開發與維護 3. 實體驗證規則技術檔案開發如DRC/LVS/PERC/LPE 4. 有3DIC, CoWoS, Physical Design 或者類比佈局經驗尤佳
As deep sub-micron process requires longer research cycle and higher manufacture cost, DV(design verification) has become an inevitable part of design group in Mediatek chip development flow. CDG DV is in charge of development and implementation of smart phone, TV, and ASIC product line verification plan. It included: integrated simulation/verification env development, big data analysis and efficiency improvement, bus fabric / EMI (External memory interface ) / Low power functions verification plan and implementation Need to build up verification plan/bench and continuously improve methodology, and you will understand both detail scenario and global view of cell phone/ASIC operating schemes Need to leverage the latest EDA tool and concept to accomplish the verification plan Work location: Hsinchu/Taipei
1.負責自動化系統, 與機台通訊, 進行資料收集與控制 2.協助生產線的需求, 完成系統 3.擅長工具:C# 程式, C語言 4.俱python / Linux / MSSQL / Oracle概念
1. 協助客戶開發、設計產品功能 2. 協助釐清、解決客戶端問題 3. 協助公板firmware與IC功能驗證 4. 配合出差至客戶端支援debug或測試 5. 協助各項功能開發與測試
1. Responsible for high-speed UCIE development, including architecture definition, verification, and customer support (familiar with architecture, firmware, debugging, optimization, and testing tasks). 2. Define architecture and specifications through simulations. ( Matlab ) 3. Develop test automation. 4. Collaborate with the team to establish system prototypes and optimize performance. 5. Achieve product integration for clients and support mass production.
1. 負責軟體之分析、設計以及程式撰寫。 2. 規劃執行軟體架構及模組之設計,並控管軟體設計進度。 3. 進行軟體之測試與修改。 4. 具備研讀英文規格能力 5. 具備網路相關產品測試經驗 6. 諳通訊網路TCP/IP概念、L2/L3 switch及router操作 7. 諳網路測試相關工具(iPerf,ping,traceroute等)者尤佳 8. 能撰寫簡單的測試腳本 (shell script)者尤佳 9. 諳通SQLServer,並能進行相關TSQL、存儲過程之編寫 10. RTOS,Linux,Android或AUTOSAR 嵌入式產品軟體開發 11. 懂CAN/LIN bus、SPI、I2C、UART等通訊協定佳 12. 負責公司MIS工作 13. 協助公司導入CRM, ERP
As an Digital IC Design Intern, you will collaborate with our researchers and worldwide colleagues and develop applications and algorithms that make a real difference in everyday devices. Your developments would significantly enhance the experience of numerous end users across our product range.
1. IC 功能驗證 2. IC 韌體撰寫(C語言) 3. 協助 CSA(Customer SA) / 客戶解決問題
1. Conducting quality check procedures to ensure high-quality deliverables. 2. Coordinating product quality issue to provide best-fit disposition for quality event impact material. 3. Ensure lessons learned from prior projects are used to improve quality management process. 4. Customer quality communication and RMA/FA management.
We are looking for a highly experienced PISI Technical Leader to join our team. The ideal candidate will have extensive experience in Power Integrity and Signal Integrity, with a strong background in high-speed IO interface simulations and PDN analysis. As a PISI Technical Leader, you will guide customers through Signal Integrity and Power Integrity signoff, model and optimize system components, and collaborate with various teams to ensure optimal package, PCB, die, interposer, and substrate designs. 1. Guide customers to complete Signal Integrity and Power Integrity signoff. 2. Model and optimize vias, connectors, sockets, breakouts, and various system components using commercial tools. 3. Perform system-level signal integrity simulation in high-speed IOs such as PCIe, SerDes 4. Architect and simulate power delivery systems, including multiple dies, substrate, interposer, PCBs, and on-die PDN models. 5. Collaborate with multiple teams, including layout, design, and customers, to optimize package, PCB, die, interposer, and substrate designs.
1. IC bring up和驗證相關工作 2. Linux Kernel Driver、系統軟體開發 3. Android 底層系統整合開發 (該職缺可於新竹、台北據點任職)
1. 設計、開發和維護多媒體應用程式,包括但不限於Video playback, Image, playback。 2. 開發和優化 Android 平台上的多媒體應用程式,確保其性能和穩定性。 3. 開發和維護嵌入式系統上的多媒體應用程式,確保其在資源受限環境中的高效運行。 4. 與設計師、產品經理和其他工程師合作,確保多媒體應用程式的功能和使用者體驗達到高標準。 5. 進行多媒體技術的研究和創新,持續改進現有產品的性能和功能。 6. 撰寫和維護技術文件,確保程式碼的可讀性和可維護性。 7. 參與產品測試和除錯,確保產品的穩定性和可靠性。 8. 依據市場需求和用戶反饋,進行產品的優化和升級。
Wi-Fi架構和數位電路設計 整個晶片的時鐘、測試和重置規劃 低功耗數位設計 從RTL到閘級的SoC晶片整合,包括時序收斂和可測試性 設計方法和整合流程改進