清大專區

工作地點: 新竹/台北/美國 1. 開發安卓服務 和 linux 守護進程 以理解使用者和應用程式行為 2. 開發Linux驅動/eBPF，收集硬體統計和相關操作條件 3. 在行動裝置上開發具有高性能和低開銷的行動數據儲存和分析平臺 4. 優化安卓設備的性能/功率/熱/遊戲/多媒體 體驗 5. 為下一代產品提供平衡成本和競爭力的設計指導

1. System design and performance evaluation for advanced wireless communication systems 2. B5G standardization-related activity 3. Log analysis and p

1.MAC/PHY protocol & system spec definition and standards development. 2.Wireless communication system architecture and system & protocol performance analysis. 3.Wireless Communication System modeling/simulation and HW/SW Prototyping 4.Drive development of industry standards at organizations such as IEEE 802.11 and Bluetooth SIG.

1. 提出系統層次的軟硬體競爭分析 2. 分析系統架構: 從系統效能/功耗/散熱面及跨不同軟/硬體模組 3. 研發次世代系統架構: 提出有競爭力且系統最佳化軟體演算法與軟硬體架構設計最佳方案 1. Propose competitive analysis of system-level SW/HW and applications 2. Research systemic issues from performance/power/thermal analysis cross software and hardware modules 3. Propose competitive analysis, near-optimal software algorithm, and/or hardware suggestion for next-generation system architecture

CPU 能耗管理架構及調教 Power management architect and tuning on Android OS or RTOS

1. Build-up methodology for SoC system-level modeling and emulation platform (ex. Zebu, PXP) 2. Analyze GPU benchmarks and critical game applications, identify performance bottlenecks from computing system level and provide HW/SW optimizations 3. Explore the best-fit computing system architecture for next generation IP and SoC

System software of AFE design, modem IDC, TA-SAR and BT COEX

• Leading Bluetooth protocol stack software development • Leading customer requirement implement and support

• Review security architecture and design • Security feature development • Make connectivity IP meet MediaTek Security baseline & customer security requirement

Work location: Chupei/Taipei UWB architecture design for mobile market

Work location: Chupei/Taipei WiFi MAC/baseband architecture design to fulfill wearable/IOT product requirement

• 專注於使用 Modern Web 技術開發提升公司各部門團隊生產力 • 擁抱產品及數據思維，以數據驅動產品功能之開發決策 • 以使用者故事 (user story) 作為開發依據，採用敏捷式開發 (Agile development) 快速迭代產品 • 重視團隊成員能力成長及團隊向心力，每月由不同成員定期做軟硬技術分享，進而達成組織目標 • 自動化測試部署確保軟體品質及提升工作效率減少時間浪費 工作內容：維護公司內部系統

1. 開發, 優化與維護 4G/5G Modem 自動化整合測試平台, CI Flow 等. 2. 開發, 優化與維護 4G/5G Modem Simulator 3. 開發, 優化與維護 4G/5G Modem 研發流程與驗證平台的 Tool Chain

-建立通訊系統模擬平台及利用模擬實驗驗證系統設計 -確保通訊系統模擬平台符合3GPP標準規範以及與基站及儀器商的一致性 -修改通訊系統模擬平台以符合實際軟硬體實作設計 - Model system level behavior and validate the design by simulations - Ensure the system simulator to comply with 3GPP spec and align with infra and machine vendors - Modify the system simulator to match the practical HW/SW partition for design verification

1. Work for Protocol verification in System Verification, to communicate with teams and co-work with modem R&D in multiple-sites in the world 2. Drive Inter-operability test Projects, for Planning, Preparation and Test execution in Japan operators Lab and Field Test. 3. Analysis and report modem protocol related issues, to collaborate with team members in System Verification and modem R&D. 4. Track modem related issues and contribute the fast correction delivery. 5. Provide technical support, to lead prompt solution to internal/external customers

Power management IC design Audio IC design Data converter IC design high speed serdes IC design

- Logic/Physical Synthesis by using advanced optimization techniques(below N7) and generate optimized Gate Level Netlist for Timing, Area, Power. - Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them. - Run Formal Verification checks between RTL and Gate level netlist and debug the aborts, inconclusive and Logic Equivalency failures. - DFT insertion, ATPG and gate-level simulation - Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis, STA, Power). - Interact with Physical Design Engineers and provide them with timing/congestion feedback.

- RTL/Logic Integration and Verification - Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for the blocks and the top level including SOC. - Use cdc tool to check RTL/SDC quality - Develop Power Intent Specification in UPF for the multi-vdd designs.

1. Define GPU compiler software architecture and interfaces. 2. Development/implement GPU compiler pipeline, linking and various optimizations/transformations. 3. Collaborate with Driver team, HW team to implement new API & HW features. 4. Collaborate with Driver team, HW team to improve/tune performance & power consumption. 5. Execute & deliver to meet milestones/schedules. 6. Analyze and debug code generation issues. 7. Analyze and influence future GPU architectures. 8. Construct reliable & trustable relationships across teams internally & externally. 9. The position can be located at Hsinchu or Taipei

1. Develop and execute comprehensive strategies/planning for key accounts 2. Design-Win execution thru value-selling, relationship development and professional services 3. Cross-Team Collaboration 4. Deliver Qualitative and quantitative results