1111人力銀行交大專區 交大專區

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  • 4/7
  • 電控工程二 - 電子工程師
  • 桃園市龜山區
  • 惠特科技股份有限公司
  • 2年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1.AC/DC or DC/DC 電源設計 2.電流源開發與設計 3.電流電壓訊號量測(nA/uV) 4.量產技術轉移,產品文件編寫

  • 4/7
  • 電控工程二 - 電路佈局工程師
  • 桃園市龜山區
  • 惠特科技股份有限公司
  • 3年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1. 熟悉 PADS尤佳,Altium designer次之 2.PCB layout 佈局,擺件,線路優化 3.與PCB板廠溝通,回應相關工程規格問題及檔案管理 4.Symbol and footprint Library建立 5.主管交辦事項

  • 4/7
  • 電控工程二- 軟體設計工程師
  • 桃園市龜山區
  • 惠特科技股份有限公司
  • 2年以上工作經歷,學歷不拘,月薪 38,500~0元0 ~ 10 人次主動應徵
  • 1.舊有機種介面的修改與維護 2.設備控制器程式開發 3.自動化設備介面開發

  • 4/7
  • 機械設計一 - 機構設計工程師Mechanism Design Engineer
  • 台中市西屯區
  • 惠特科技股份有限公司
  • 工作經歷不拘,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1.協助新機新規格修改及設計 2.機台新舊檔案BOM及資料整理 3.新產品應用設計開發 4.主管交辦事項 - 1. Design new machines and modify existed machines. 2. Edit machine BOM and correcponding documents. 3. Handle tasks assigned by superiors.

  • 4/7
  • 機械設計二 - 機械設計工程師
  • 台中市西屯區
  • 惠特科技股份有限公司
  • 1年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1.自動化設備開發 2.機構設計 3.結構分析

  • 4/7
  • 繪圖設計人員
  • 高雄市三民區
  • 順誠能源股份有限公司
  • 工作經歷不拘,學歷不拘,月薪 32,000~40,000元0 ~ 10 人次主動應徵
  • 1. 使用CAD軟體(如AutoCAD、SketchUP等)繪製和修改電力機械設備及零組件的技術圖紙。 2. 設計並製作設計文件,確保符合工程標準與規範要求。 3. 進行設計可行性與成本效益分析,提出改良設計方案。 4. 持續學習與應用新技術及行業趨勢,提升設計和生產效率。 期待您的加入,讓我們一同設計與創造卓越的電力機械產品,打造未來科技!歡迎即刻投遞履歷,加入我們的團隊!

  • 4/7
  • 軟體開發一 - 測試工程師
  • 台中市西屯區
  • 惠特科技股份有限公司
  • 工作經歷不拘,學歷不拘,月薪 37,500~0元0 ~ 10 人次主動應徵
  • 1.軟體除錯,處理光電量測試需求,工具 BCB、C# 2.客戶端維護設備,進行分析問題與追蹤 3.研發機軟硬體功能與長效測試 4.維護與產出SOP與機台手冊 5.主管交辦事項

  • 4/7
  • <Data center>System Architect Design Engineer
  • 新竹市東區
  • 聯發科技股份有限公司
  • 4年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1. Responsible for high-speed UCIE development, including architecture definition, verification, and customer support (familiar with architecture, firmware, debugging, optimization, and testing tasks). 2. Define architecture and specifications through simulations. ( Matlab ) 3. Develop test automation. 4. Collaborate with the team to establish system prototypes and optimize performance. 5. Achieve product integration for clients and support mass production.

  • 4/7
  • CPU Platform Design Engineer
  • 新竹市東區
  • 聯發科技股份有限公司
  • 2年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1. CPU system design and performance analysis 2. System bus architecture and integration 3. IP and system verification 4. Debug Architecture related IP design and integration

  • 4/7
  • <Automotive>SoC Power and Performance Architect / Designer
  • 新竹市東區
  • 聯發科技股份有限公司
  • 4年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1. Define power states and management hardware architecture for optimal power performance. 2. Design microprocessor-based power management controller and HW assistance designs. 3. Define power architecture by performing power rail tradeoff analysis with adaptive voltage scaling consideration

  • 4/7
  • <Automotive>SoC Interconnect Architect, Designer, and Methodology Developer
  • 新竹市東區
  • 聯發科技股份有限公司
  • 4年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • We are seeking skilled engineers for designing high-performance Virtualization and Interconnect Architecture and developing RTL for both Automotive and High-Performance Computing. Roles: 1. Develop, assess, and refine RTL to achieve performance, power, area, and timing goals. 2. Develop micro-architecture by exploring early high-level macro architectures, researching micro-architecture, and defining detailed specifications. 3. Coordinate co-design efforts between architecture, software, and hardware teams to achieve functional realization. 4. Develop and implement interconnect methodologies, such as simulation, emulation, implementation, and efficiency improvement.

  • 4/7
  • <Automotive>SOC High Speed Interface software engineer
  • 新竹市東區
  • 聯發科技股份有限公司
  • 4年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1. Implement and maintain device drivers, or firmware for high-speed interfaces, such as PCI Express, MIPI CSI-2, USB or UFS. 2. Develop FuSa and security software framework for high-speed interfaces to fulfill automotive requirements.

  • 4/7
  • <Automotive>SOC clock architect
  • 新竹市東區
  • 聯發科技股份有限公司
  • 4年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1. Develop scalable platform clocking architecture for automotive SoC 2. Enhance SoC clock architecture and technology development to address the automotive SoC requirements 3. Drive clock architecture and designs to optimize power, performance, and implementation, including physical design and timing closure

  • 4/7
  • 數位IC設計工程師_台北
  • 台北市內湖區
  • 聯發科技股份有限公司
  • 2年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1.Digital design (RTL design, Synthesis, integration, verification) 2.SoC Chip design, integration 3.Familiar with VLSI design flow is a plus

  • 4/7
  • 4G/5G 通訊協定與系統工程師
  • 新竹市東區
  • 聯發科技股份有限公司
  • 2年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • • 此職位屬於聯發科技modem客戶工程團隊,該團隊任務為與內部研發團隊合作,支援全球一流智能手機客戶的無線通訊技術(包括LTE、5G Sub-6GHz和5G mmWave技術)。 • 此職位主要職責在與客戶合作過程中帶領技術討論,並與內外部不同團隊合作,共同討論並解決客戶問題、滿足需求。 • 此職位需具備深入研究技術問題、了解客戶需求分析與功能開發的能力及良好應變能力。 • This is an exciting role in the MediaTek wireless technology group within the modem customer engineering team working with internal R&D team and support tier-1 global smartphone customers in wireless technologies (LTE, 5G Sub-6GHz, and 5G mmWave technologies) • You will play a key technical role in working with internal and external stakeholders to lead technical discussion and drive customer issues to resolution. • This is a dynamic position that will interact and collaborate with different teams and site location. • Ability to deep dive technical issues, understand customer requirement analysis and feature development. Looking for 4G/5G Modem Protocol / System Engineer with technical breadth in the protocol stack.

  • 4/7
  • 系統應用工程師_台北
  • 台北市內湖區
  • 聯發科技股份有限公司
  • 2年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1. LCD Monitor IC相關的韌體開發 2. 影像處理相關應用與支援客戶產品開發 3. LCD Monitor周邊軟體tool開發

  • 4/7
  • 產品工程師PMIC
  • 新竹市東區
  • 聯發科技股份有限公司
  • 6年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • IC 產品發展, 產品量產管理與良率改善, 除錯與問題的解決

  • 4/7
  • 系統單晶片實體設計工程師
  • 新竹市東區
  • 聯發科技股份有限公司
  • 工作經歷不拘,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • 1. Work on 3~7nm design implementation, methodology, and sign-off 2. Perform synthesis, DFT, floorplan, clock planning, place and route, timing closure, ECO, IR signoff, and physical verification 3. Manage schedule, resolve design and flow issues, drive methodologies and execution

  • 4/7
  • Analog/Mixed-Signal Design Verification Methodology Development Engineer
  • 新竹市東區
  • 聯發科技股份有限公司
  • 10年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • Work in Analog/Mixed-Signal Design Verification Methodology Development group to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows, and work hands-on with AMS IP Teams for AMS DV flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with digital design, analog design, analog behavioral modeling and design verification teams, apply and advance existing and evolving Digital and AMS Verification methodologies and processes, and contribute to establish and maintain Verification Platform to ensure High Quality and High Efficiency of Pre-Si Verification Delivery towards high quality silicon products. • Work in methodology development team to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows. • Work with teams to enable deployment of new flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as SERDES, etc) and integration. • Document on new flows and processes for AMS DV. • Apply wide range of Digital and/or AMS DV skills to help and support AMS IP or Chip DV Teams to establish or enhance new or existing DV capabilities, including but not limited to developing scalable and portable Test bench, test cases, drivers, checkers, assertions and reference models, and running RTL and Gate Level simulations and reaching all coverage closures. • Contribute to continuous improving on AMS DV process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification, and post-Silicon testing teams to address new needs or requirement on DV Support. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA

  • 4/7
  • Analog/Mixed-Signal Modeling Methodology Development Engineer
  • 新竹市東區
  • 聯發科技股份有限公司
  • 10年以上工作經歷,學歷不拘,面議(經常性薪資達4萬元或以上)0 ~ 10 人次主動應徵
  • Work in Analog/Mixed-Signal Modeling and Verification Methodology Development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows, and work hands-on with AMS IP Teams for AMS Behavioral Modeling flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with AMS IP teams including digital design, analog design, analog behavioral modeling and design verification members, apply and advance existing and evolving AMS Behavioral Modeling methodologies and processes, and contribute to establish and maintain Modeling Platform to ensure High Quality and High Efficiency of Pre-Si AMS Modeling, Validation and Verification delivery towards high quality silicon products. • Work in methodology development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows. • Work with teams to enable deployment of new AMS Behavioral Modeling flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as RF, etc) and integration. • Document on new flows and processes for AMS Behavioral Modeling. • Apply wide range of AMS Behavioral Modeling skills to help and support AMS IP or Chip Teams to establish or enhance new or existing Modeling capabilities, including but not limited to Model Development, Model Validation to ensure Consistency of Behavior with Original Circuit, Integration of Models into various Verification Environment, fixing Modeling issues found in simulation, etc. • Contribute to continuous improving on AMS Behavioral Modeling process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification teams to address new needs or requirement on AMS Behavioral Modeling. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA