清大專區

Job Description -　Main contact window with business lines (BLs) to deliver a high quality and manufacturable product for IC test production, meeting or exceeding the required time to market or product cost. -　Take lead of new product introduction (NPI) for IC test -　To coordinate with related BLs (business line) and align with wafer/final test factories to prepare the product transfer -　To improve new product introduction procedure to enable smooth product transfer -　To reduce risk and impact to customers and factories, escalation management, e.g. reduce risk and impact by right and timely escalation -　To ensure no gap on test tooling availability Facilitate IC test data review and process for planning forecast, take responsibility on test technical data (and improvement plan) in time and accuracy -　To follow up test improvement projects, hold lots, progress of New Product Introduction, test buy off…etc. -　Process of Test Engineering Notice and Enovia ECO Requirement -　Bachelor degree (or above), Engineering background is preferred. -　Excellent communication skills (English/Mandarin, TOEIC＞600) -　Good logic thinking -　Be familiar with MS Office tool -　1 yrs experience in IC testing or related working experience is preferred

Job Responsibilities - To be the owner for manufacturing test on the released products. - Responsible for test program introduce to mass production - Responsible for NPI (after R-gate released) test data analysis and feedback to BL/PETE if any improvement needed - To be the owner for duplicated test hardware by performing debug and qualification, MSC (Gage R&R) analysis and release report - Responsible for 1st line hold lot disposition, including low yield, QA fail .......etc - To initial and work with related process owners on testing processes, documentation, and best practices - Participate in or drive test automation initiatives when applicable Required Qualifications - 3+ years of experience as a Test Engineer - Solid understanding of software/system testing methodologies - Familiarity with Linux environments and command-line operations - Experience with machine language (e.g., Java, C++) - Experience in system, embedded, hardware, or manufacturing testing - Strong analytical and problem-solving skills - Strong sense of ownership and responsibility for product quality English communication, reading, writing

***Please apply for this position on NXP official website: https://pse.is/8ms2kr Role Purpose Lead the development and optimization of high-voltage (HV) and BCD device architectures. This role requires a deep understanding of device physics and a data-driven approach to ensure industry-leading performance and reliability for power management solutions. Key Responsibilities － Device Development: Lead the architecture design and optimization of HV devices (LDMOS, EDMOS, ESD) on 180nm to 55nm BCD nodes. － Physics Analysis: Analyze and optimize Device Physics parameters, including BV, Rdson, SOA, and reliability (HCI/NBTI). － Simulation & Modeling: Utilize TCAD for 2D/3D process and device simulations to accelerate development cycles. － Device Verification: Define verification plans and execute statistical analysis using JMP for DOE and WAT data. － Design Integration: Work within Cadence environments for layout review and test structure design. － Cross-functional Collaboration: Partner with PI and PE teams to resolve yield, reliability, and manufacturing bottlenecks. Required Qualifications － Experience: Master‘s or Ph.D. in EE, Physics, or related field with 10+ years of semiconductor industry experience. － Technical Expertise: 1. Profound knowledge of Device Architecture and Device Physics. 2. Hands-on experience in 180nm to 55nm BCD process nodes. － Tools: 1. Expertise in TCAD (Sentaurus / Silvaco). 2. Expertise in JMP for statistical data analysis. 3. Proficiency in Cadence (Layout/Virtuoso). Preferred Qualifications (Plus) － Advanced Power Devices: Experience with GaN, SiC, or IGBT development. － Silicon Photonics: Knowledge of Photonics integration and device physics. － Domain Knowledge: 1. Process Integration (PI): Understanding of mask flow and doping profiles. 2. Product Engineering (PE): Experience in CP/FT data correlation and yield enhancement. Competencies － Accountability: Strong ownership of project milestones and outcomes. － Critical Thinking: Ability to identify root causes in complex device failures. － Interpersonal Skills: Effective communication across design and foundry teams. － Data-driven: Committed to objective decision-making through rigorous data analysis.

The key areas of responsibility of the jobholder are: - Collaborate closely with foundries, NXP technology teams, and business lines to qualify and release advanced FinFET processes. - Provide technical leadership in semiconductor device physics, especially in FinFET architecture and behavior. - Interface with internal and external stakeholders on critical development and transfer projects. - Lead and steer projects to meet timelines and business objectives. - Make key decisions on process integration, balancing technical, logistical, and strategic factors. - Support NTI process transfers within foundries and NXP joint ventures Requirements / preferences: - Bachelor‘s or Master‘s degree in Electrical Engineering, Physics, or related field. - Minimum 10 years of experience in semiconductor device engineering, with a strong focus on advanced logic/RF devices. - Proven hands-on experience with HKMG and FinFET technologies in production or development environments. - Deep understanding of semiconductor device physics, especially HKMG and FinFET. - Strong analytical skills in yield enhancement and electrical data analysis. - Fluent in English and Mandarin. - Demonstrated leadership in development, transfer, or ramp-up projects. - Excellent communication and influencing skills. - Proactive, pragmatic, and results-driven mindset. - Experience working with foundries and leveraging external manufacturing capabilities .

- Data analysis to ensure handler work on baseline. Ex. MCBA, index time, temperature control and HW interface maintenance 資料分析確保機台運作在基準條件, 包含作動不順, 作動時間, 溫度控制, 及機台介面維護 - SOP, OCAP, PM document creation. 建立標準化流程,異常處理文件,及保養維護文件 - Responsible for the performance of handler. 負責機台性能及相關報告 - Handle the improvement project on handler. 持續進行機台的改善計畫 - Management recipes of handler and spare parts 機台參數管理及備品管理 - Provide technology and operation training to shift assistant engineer and operators in manufacture lines to support production smoothly. 訓練助理工程師與作業員以利生產線順利運作 - Co-work with worldwide handler team for evaluation/improvement 與其他機台團隊跨國合作, 導入評估, 問題改善

***Please upload English resume onto our official platform: https://reurl.cc/1bbx6m Job Descriptions - The selected candidate will participate in Wi-Fi/BT software/firmware design , implementation, integration, validation and maintenance phases for standard based and non-standard based Wi-Fi/BT/BLE products for IOT and automotive markets. - Lead/participate in complex feature integrations/enhancements, Wi-Fi/BT/BLE SoC bring up, and technical issue solving. - Research, design and develop cutting edge technologies for industrial features and IEEE/WFA/BT/BLE spec. Ranging from Wi-Fi enterprise access point, embedded clients and other wireless technologies. - Participate the full life cycle of IC – spec designing, pre-silicon validation, chip bring-up, software development, customer engaging and supporting. Support customers remotely or onsite as needed. Qualifications - MS in EE, CE, or CS. - Proficient in C programming language. - Experience on Linux / Android programming is a plus - Knowledge on real-time OS (FreeRTOS / ThreadX) programming is a plus - Knowledge of ARM assembly is a plus - Team player and excellent interpersonal, communication and writing skills - Independent, self-motivated and willing to learn

Please apply for this position on NXP official website: https://pse.is/836k2a Job Responsibilities: APAC Central Competence Team works with external foundries to ensure stable chip supply for business lines across NXP. The primary responsibility of this role is to locally drive the lead products ramp up under new technology introduction (NTI). The key areas of responsibility of the jobholder are: 1. Close collaboration with foundries, NXP technology groups, the business lines and various other stakeholders to qualify and release process 2. Front end process safe launch owner. Closely work with foundries at ramp up phase and drive for manufacturability and yield improvement. 3. Interface with key customers on critical projects. 4. Lead and steer the projects towards timely completion to support NXP business needs 5. Main decision maker on subjects related to process integration, striking a good balance between the various dynamics in a project; not limiting to technical judgement, resource planning, project schedule, logistics, supplier relationships etc Requirements / preferences: 1. Bachelor or MSc in physics or electrical engineering. 2. ＞10 years of experience with front-end IC process integration, working in foundries’ production or development teams 3. In-depth knowledge of IC devices and processes. FinFET and NVM knowledge is a plus. 4. Strong understanding of yield enhancement techniques and data analysis 5. Must be fluent in English and Mandarin 6. Hands on experience in being a lead; leading teams with responsibilities in development / transfer projects or production ramp up. 7. Good communication skills. Having the ability to influence and steer a discussion 8. Pro-active working attitude, creative, pragmatic, enterprising and result driven. 9. Familiar in managing/working with foundries, maximizing leverage from foundries

1、IoT／網通產品WiFi Router、Network Device 硬體架構規劃與電路設計開發 2、MCU電路設計與整合 3、WiFi／Ethernet 電路設計與高速訊號規劃 4、BLE與無線通訊介面設計 5、PCB設計與Layout協作電路佈線與驗證 6、EMI / EMC / RF 測試與問題分析改善 7、樣品驗證與量產導入

1設備組立&配管作業。 2.設備組立問題處理與紀錄。 3.客戶端零組件安裝保養。 4.組裝環境&工具管理維護。 5.設備零組件管理。 6.設備零組件進貨檢查管理。 7.設備出機前置作業。 8.設備交機作業。 9.部門制式文書表格資料撰寫。 10.參加外部課程訓練。 11.主管交辦事項處理。

1.協助客戶設備安裝/維護/調整 2.維持客戶設備在廠營運及現場故障排除 3.協助編寫機台故障報告及說明問題原因 4.協助客戶端機台修改線路及機構安裝調整

1.協助客戶設備安裝/維護/調整 2.維持客戶設備在廠營運及現場故障排除 3.協助編寫機台故障報告及說明問題原因 4.協助客戶端機台修改線路及機構安裝調整

1.案件設計執行：依客戶或內部設計需求，完成案件的電路板/載板佈線（Layout）設計。 2.除錯與優化 (Debug)：協助設計案件的除錯與問題分析，確保設計符合規範。 3.新技術開發支援：協助新型機台測試載板的研發與規格開發。 4.案件討論：參與內部案件技術討論，與設計、測試團隊密切溝通，優化整體設計流程。 ★歡迎電子電機相關科系之應屆畢業生，或曾有Layout相關經驗之求職者投遞 ★若您非相關科系畢業，但具備基礎電路學之概念，也歡迎投遞 【薪資說明】 1.本職缺薪資範圍係以大學學歷(相關科系)初估，含設計獎金月薪平均可達4萬以上，且有資格領取超額獎金之人員保證年年調薪。 2.本公司鼓勵多產多得，除每半年依產出計算點數並發放獎金外，每年再依點數達成狀況進行調薪。

1. 協助半導體生產設備的安裝、組立 2. 更換、調整和修復各種半導體設備的故障零件 3. 撰寫報告 4. 提出改善方案和預防措施，解決設備異常問題 5. 與客戶溝通並提供協助 這個職位是在半導體行業中非常重要和具有發展前景的職位。我們正在尋找一位擁有技術能力和人際交往能力的半導體設備工程師，來保證生產線的順暢運作和設備效率的最大化。 如果您擁有上述的資格和技能，請立即申請加入我們的團隊，這是一個有挑戰性和具有發展前景的職位。

我們是一家專注於金融輔助服務的公司，致力於幫助客戶透過創新的行銷手段拓展市場並提升競爭力。我們的主要客群涵蓋金融相關企業與個人，用數位科技為客戶提供完善的行銷解決方案。 工作內容： 1. 使用數位行銷技巧（如社群媒體管理、數位廣告投放等）進行潛在客戶的開發，包含透過電銷、社群媒體互動及內容推廣等方式擴展客戶基礎。 2. 制定並執行行銷計畫，分析用戶數據與行為，提供精準的行銷策略建議，如內容方向、轉化設計及受眾分析。 3. 操作並維護客戶關係管理系統（CRM），高效整理和分析客戶名單與流量數據，優化行銷資源配置。 4. 針對客戶需求進行深度溝通，提供合適的行銷解決方案及具體執行建議，協助其達成商業目標。 5. 即時回應客戶來自LINE、Instagram及廣告留言平台的諮詢，提升客戶滿意度與成交效率。 6. 協助客戶執行數位行銷計畫，包含內容經營、廣告投放以及相關數位工具的操作，提升轉換率並解決執行過程中的問題。 7. 協助策劃與執行公司整體行銷活動，包括推廣內容創意發想及執行。 8. 持續學習數位行銷最新趨勢與工具，為公司帶來創新行銷資源與策略。 我們正在尋找熱衷數位行銷並具備優秀溝通能力的合作夥伴！如果你希望在行銷領域深耕，有意挑戰自己並與專業團隊一同創造價值，歡迎加入我們，立即投遞履歷，期待您的加入！

【公司環境】 ▶ CW每年度皆獲得蝦皮金選，保護貼銷量第一 粉絲數量135萬、累積超過450萬買家評價 品牌穩定、產品齊全，擁有大量會員 ▶ 工作環境良好、團隊氛圍佳，重視專業與互助 【工作內容】 ✨ 需熟悉網紅生態及網路行銷概念 ✨ 與KOL洽談並安排合作(執行團購活動、社群曝光、導購)、進度控管 ✨ 經營社群平台，追蹤合作進度與內容表現 ✨ 協助品牌曝光與企業形象推廣 ✨ 完成其他主管交辦事項 【職務需求】 ✨ 熟悉網路媒體以及社群網路行銷市場環境，樂於掌握網路行銷趨勢 ✨ 具備良好的溝通應對以及製作簡報能力 ✨ 一年以上的相關經驗(如：廣告、活動、公關公司、媒體等...客戶端相關職務) ✨ 活動企劃與文案撰寫能力 ❌ 無相關經驗者請勿投遞履歷 【基本福利】 ✨ 勞健保、勞退提撥 ✨ 三節禮金 ✨ 年終獎金 【面試地點】 CW總公司 - 台中市西區五權五街151號7樓4-3室 [ 10樓以上是商旅、請搭乘電梯前往7樓辦公室 ]

• 負責軟體產品品質驗證與測試規劃，確保系統穩定與功能正確 • 執行跨裝置與跨瀏覽器測試，確保不同環境下皆有一致的使用體驗 • 與產品、開發及設計團隊合作，提升整體產品品質與交付效率 • 持續優化測試流程與品質控管機制，降低產品風險 ––- 📌 主要職責 1.測試規劃與設計 • 依據產品需求撰寫測試計畫、測試案例與測試腳本 2.相容性測試 • 進行跨瀏覽器（Chrome、Firefox、Safari、Edge）及跨裝置（iOS / Android）測試 • 確保不同解析度與裝置下功能正常運作 3.測試執行 • 執行手動測試（探索測試、功能測試、整合測試、回歸測試） 4.缺陷管理 • 記錄與追蹤 Bug（使用 Jira 等工具） • 與開發團隊合作確認問題並完成驗證 5.團隊協作 • 參與 Agile / Scrum 開發流程（需求討論、Sprint 規劃、版本釋出） 6.測試報告 • 整理測試進度、缺陷狀況與產品品質報告 ––- 📌 職務需求 • 具 2 年以上軟體測試或 QA 經驗 • 熟悉軟體開發流程（SDLC）及 Agile / Scrum • 具跨瀏覽器與跨裝置測試經驗 • 具備撰寫測試計畫與測試案例能力 • 熟悉缺陷追蹤工具（如 Jira） • 資訊相關科系尤佳

We are seeking a highly skilled and motivated AWS Cloud Infrastructure Engineer to design, implement, and manage our core AWS cloud infrastructure. You will be instrumental in automating our deployments, ensuring system performance, and leveraging ArgoCD for our GitOps workflows to maintain a robust, cost-optimized environment. Key Responsibilities ● Experience: 3+ years of hands-on professional experience working with AWS infrastructure at scale. ● AWS Services Expertise: Deep knowledge of core AWS services, including VPC, EC2, S3, RDS, Lambda, EKS/ECS, IAM, and Route 53. ● GitOps Proficiency: Strong, practical experience with ArgoCD for managing application deployments and synchronization. ● Kubernetes: Excellent working knowledge of Kubernetes (EKS), including writing custom resources, Helm charts, or Kustomize configurations. ● Scripting: Proficient in scripting languages such as Python or Bash. ● Networking: Strong foundational knowledge of networking concepts (TCP/IP, DNS, Load Balancing, Firewalls). ● Certification: AWS Certified Solutions Architect - Associate or AWS Certified Developer - Associate (or equivalent experience). If you are passionate about GitOps, excited by ArgoCD, and ready to build the next generation of scalable infrastructure on AWS, we encourage you to apply!

1.專案接洽與系統規劃 2.文件送審與材料請購 3.發包製造與品質管理

1. 國內外各飯店專案相關業務。 2. 國內外客戶售後服務英文連繫工作。 3.能配合海外出差或參展。 4.團隊合作無業績壓力。 5.主管交辦事項。

1.PLC系統開發與維護： 負責Keyence(KV系列)、Beckhoff(TwinCAT)之程式Ladder/ST編寫與除錯。 2.運動控制整合： 負責伺服馬達、步進馬達之參數調校及多軸運動控制(Motion Control)。 3.人機介面 (HMI) 設計： 規劃與撰寫 Proface, Keyence, Delta 等人機介面流程與操作畫面。 4.電控硬體查修： 具備基本電路查修能力。 5.跨部門溝通與交辦事項執行。