清大專區

1. CPU system design and performance analysis 2. AMBA System bus architecture and integration 3. IP and system design and verification

1. CPU system design and performance analysis 2. AMBA System bus architecture and verification 3. IP and system verification

1.Propose design verification plan and do the execution based on IP and system HW architecture/application 2.Develop design verification environment 3.Develop required verification methodology and adopt into project

CPU Physical Implementation Engineer Responsible for physical design and development activities of MediaTek’s Ghz ARM/Imagination-based graphics processors, AI processors and neural network DS. Involve in activities encompass physical design and analysis of complex and timing-critical graphics processor AI processors and neural network DSP. Technical disciplines include Physical Implementation (floor-planning, place and route, RC extraction, timing and power optimization) & signoff (DRC, LVS, STA, PI).

1) 設計與建置 IT 客服 AI 支援方案 (如：服務品質監控、智慧助理)。 2) 應用 IaC (基礎設施即程式碼) 原則，管理終端設備及用戶問題排除。 3) 分析全球 IT 客服營運數據，優化服務流程及使用者體驗。 4) 持續研究與導入新技術趨勢並提出改善建議 (如：無密碼驗證、WoA、AI PC)。 1) Design and implement AI-driven IT Helpdesk support solutions (Quality Assurance, Helpdesk Assistant) to enhance service quality. 2) Apply IaC (Infrastructure as Code) principles to manage OA endpoints, issue resolution and user requests. 3) Analyze Global Service Desk operations and leverage data to optimize support processes and user experience. 4) Continuously research and adopt new workplace tech. and trends, proposing improvements. (e.g., Passwordless, WoA, AI PC)

1. 研發 GNSS 基頻訊號處理算法，含 GPS、Galileo、BeiDou、GLONASS、NavIC、QZSS 和 SBAS。 2. 研發基頻硬體 C-model 和 RTL 設計驗證。 3. 研發 GNSS HW+SW receiver 於 DSP 嵌入式系統，含 SW 設計、算法實作和系統整合。

開發加速度計誤差估計和姿態估計的演算法。你會和衛星定位團隊一起合作，包括觀測量團隊、定位算法團隊，以及衛星定位及慣性導航融合算法團隊。這個職缺的主要工作是演算法開發，主要負責智慧型手機不同感測器與衛星定位融合的演算法開發。需對於從演算法開發到最終產品量產的完整流程充滿熱忱。 1. 探索並分析定位精度問題，以改善衛星定位晶片的定位性能 2. 開發數學模型和模擬軟體，做概念驗證 3. 參與路測並收集智慧型手機上的衛星定位晶片與慣性感測器的原始數據 4. 將算法實作成軟體程式，使其可以在晶片上即時運作 5. 測試軟體執行結果，除錯，改善並重複以上步驟來最佳化你的算法，並滿足客戶的需求

1. GPU driver development. 2. GPU compiler development. 3. GPU application development.

1. High Speed digital design implementation 2. Integration from RTL to gate level, including flow QC, timing closure and issue analysis & solving 3. Signoff on design with mixed-signal interface 4. Design methodology and integration flow improvement

配合南亞科FAB-5A 新建廠房機電(水、電力、氣化、空調系統)監造及工程協調。

•熟悉DDR4 SDRAM內部架構，定址方式，與指令集。 •理解AC參數(tWR/tRP/tRCD等時序限制與DC參數(IDD current, Vinput/Voutput準位等)。 •熟悉MOSAID 5205E操作。 •熟悉March Test/checkboard/Walking pattern。 •熟悉GSE的運用。 •熟悉TCS使用，bitmap分析。

1. 領導IC專案的軟體開發（功能開發與驗證） 2. 追蹤開發進度並解決技術問題 3. 與軟體/韌體團隊合作 4. 有與IC驗證團隊合作經驗者尤佳

1) 設計與建置 IT 客服 AI 支援方案 (如：服務品質監控、智慧助理)。 2) 應用 IaC (基礎設施即程式碼) 原則，管理終端設備及用戶問題排除。 3) 分析全球 IT 客服營運數據，優化服務流程及使用者體驗。 4) 持續研究與導入新技術趨勢並提出改善建議 (如：無密碼驗證、WoA、AI PC)。

Machine Learning - Architect/Researcher/Engineer - Accelerator, Deployment and Infrastructure [Overview] MediaTek HQ is looking for Machine Learning Architect, Researcher, or Engineer who is passionate about System Platform, Software Engineering, and Applied Machine Learning (including Deep Learning and AI). This position is within MediaTek’s AI Group. This R&D role offers a dynamic environment, hands-on learning, and a unique opportunity to develop both Infrastructures and Accelerators for state-of-the-art (SOTA) machine learning, as well as to build applications utilizing SOTA machine learning techniques. You will join a team devoted to developing and deploying cutting-edge machine learning and deep learning algorithms, optimized for MediaTek’s NPU—and, conversely, optimizing our NPU for advanced ML/DL workloads.

RTL設計 數位電路設計 數位多媒體系統設計

1. AI處理器, DSP, 和相對應的周邊IP驗證環境開發 2. 從module到IP的功能驗證及自動化環境 3. Formal技術探討及實作 4. 設計測試pattern以對低耗電及效能做分析 5. Post-silicon 除錯 及 耗電/效能correlation

- Responsible for system analysis and design - Responsible for SAP ABAP customized program development - Responsible for SAP ERP SD or MM module operation and maintenance - SAPUI5 Web program development - 負責系統分析與設計 - 負責SAP ABAP客製程式設計與開發 - 負責SAP ERP SD or MM 模組維護 - SAP UI5 Web 程式設計與開發

1. Design and RTL implementation of SoC debug modules 2. Integration and verification of debug components (e.g., trace, monitor, access port) 3. Debug signal capture, trace, and analysis for SoC platforms 4. BUS topology and debug mechanism circuit design 5. Support SoC debug flow and issue localization 6. Collaborate with cross-functional teams to optimize debug performance 7. Documentation and test specification for SoC debug features

1. Architecture design and RTL implementation of SOC platform. 2. SoC system performance analysis

1. 旗艦智慧型手機晶片整合 2. 車用系統晶片整合 3. 晶片整合流程與自動化程式設計 4. Timing收斂與分析 5. SoC Floorplan架構設計 6. SoC Clock架構設計