清大專區

1. 負責平台遊戲運營工作，原廠內容對接、上線與活動時程規劃。 2. 根據業務目標，明確訂定運營工作時程與執行計劃，提高用戶新增、活躍、收入。 3. 追蹤及評估運營成效，分析用戶行為、消費習慣，從市場/運營角度提出具體改進需求。 4. 熟悉商業運作，以盈利為目標，進行專案損益控管。 5. 洞察開拓新市場與機會，並負責部門協作確保順利實施。 6. 專案簡報製作與會議報告。

1. 負責手機遊戲運營工作，運營體系規劃、計劃制訂推動。 2. 根據業務目標，明確訂定運營工作時程與執行計劃，提高用戶新增、活躍、收入。 3. 追蹤及評估運營成效，分析用戶行為、消費習慣，從市場/運營角度提出具體改進需求。 4. 熟悉商業運作，以盈利為目標，進行專案損益控管。 5. 洞察開拓新市場與機會，並負責部門協作確保順利實施。 6. 專案簡報製作與會議報告。

We are looking for an Account Manager based in Taiwan who is passionate about the electronics industry and capable of driving sales for our timing and frequency-control products. We value candidates who demonstrate Passion, Respect, Courage, Perseverance, and Integrity—qualities that are essential for representing Rakon and supporting our values customers. Job description 1. Build and maintain well relationships with ODM design engineers, product management and purchasing teams in the telecommunications, data center, and positioning markets. 2. Identify and develop new design-in opportunities, expanding the opportunity funnel and driving long-term growth. 3.Take full ownership of assigned distributor and channel accounts, ensuring revenue growth and long-term business development. 4.Understand customer hardware architectures and articulate how Rakon’s products fit into the system level design requirements. 5. Promote Rakon’s product portfolio across new and existing accounts, ensuring alignment with key sales metrics and service delivery objectives. 6. Meet budget, forecast, and sales targets, including all assigned KPIs. 7. Influence the telecom, datacenter, and positioning industry value chains to ensure Rakon’s oscillator products are well-positioned in next-generation platform designs. 8. Plan and manage demand forecasts System for assigned customers to support logistics operation. 9. Collaborate closely with Sales Operations, Business Development, Product Management, and factory coordination teams to ensure successful project execution and design In Tasks. 10. Support cross-regional teamwork within Rakon’s global virtual sales team to achieve shared business goals.

制定並實施提升網站自然流量的SEO策略，進行關鍵字分析與頁面優化，持續追蹤與評估SEO的表現，以及保持對最新搜尋引擎演算法與趨勢的掌握。此外，還需與行銷、開發等跨部門團隊協同合作，以達成本公司行銷目標。 主要職責包括： SEO策略的規劃與落實：根據公司目標設計並執行全面的SEO方案，以提升網站的自然搜尋排名與流量。 關鍵字研究與內容優化：仔細分析產品關鍵字，排定寫手每週文章內容，審核上架。 頁面優化：改善網頁標題、描述、內容結構、內部鏈結與外部連結，提升用戶體驗與搜尋引擎的友好度。 成效監測與分析：運用SEO工具追蹤網站表現，分析數據並提出改善建議。 趨勢追蹤：密切注意最新的SEO動向與Google演算法的變化，確保策略具有前瞻性。 跨部門合作：與行銷、技術開發等團隊密切配合，確保SEO策略與整體企業目標一致。 競爭對手分析：研究競爭者的策略，發掘市場的機會與挑戰，以制訂更有效的行動方案。

制定並實施提升網站自然流量的SEO策略，進行關鍵字分析與頁面優化，持續追蹤與評估SEO的表現，以及保持對最新搜尋引擎演算法與趨勢的掌握。此外，還需與行銷、開發等跨部門團隊協同合作，以達成本公司行銷目標。 主要職責包括： SEO策略的規劃與落實：根據公司目標設計並執行全面的SEO方案，以提升網站的自然搜尋排名與流量。 關鍵字研究與內容優化：仔細分析產品關鍵字，排定寫手每週文章內容，審核上架。 頁面優化：改善網頁標題、描述、內容結構、內部鏈結與外部連結，提升用戶體驗與搜尋引擎的友好度。 成效監測與分析：運用SEO工具追蹤網站表現，分析數據並提出改善建議。 趨勢追蹤：密切注意最新的SEO動向與Google演算法的變化，確保策略具有前瞻性。 跨部門合作：與行銷、技術開發等團隊密切配合，確保SEO策略與整體企業目標一致。 競爭對手分析：研究競爭者的策略，發掘市場的機會與挑戰，以制訂更有效的行動方案。

1. PADS軟體使用， layout佈局，線路設計，繪製，BOM製作。 2. DEBUG。 3. 對RF有經驗者佳。 4. 量產資料及技術轉移。 5. 與軟、韌體工程師配合，協同合作。 6. 示波器，網儀，Spectrum等儀器的操作及使用。 7. 熟烙鐵焊接佳。

1.以顧客熟悉之語言做顧客市場開發並推銷產品 2.英文聽說讀寫流利 3.具備經驗

1. 架構和數位電路設計 2. RTL實做和驗證 3. SoC chip整合和RTL到gate level實現, 包含timing分析跟量產測試 4. 設計方法和整合流程改善

1. CPU Architect 2. CPU Performance Architect 3. CPU Design Verification Lead

負責開發5G SOC的軟/韌體並讓產品量產 1. 開發/Porting/優化5G晶片的軟/韌體 2. 開發/維護 5G 網通/網卡/模組等相關功能

• Define GPU compiler software architecture and interfaces. • Development/implement GPU compiler pipeline, linking and various optimizations/transformations. • Collaborate with Driver team, HW team to implement new API & HW features. • Collaborate with Driver team, HW team to improve/tune performance & power consumption. • Execute & deliver to meet milestones/schedules. • Analyze and debug code generation issues. • Construct reliable & trustable relationships across teams internally & externally.

1) 確認規格 2) 探索架構 3) 評估技術可行性 4) 協調設計方案

Work in Analog/Mixed-Signal Design Verification Methodology Development group to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows, and work hands-on with AMS IP Teams for AMS DV flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with digital design, analog design, analog behavioral modeling and design verification teams, apply and advance existing and evolving Digital and AMS Verification methodologies and processes, and contribute to establish and maintain Verification Platform to ensure High Quality and High Efficiency of Pre-Si Verification Delivery towards high quality silicon products. • Work in methodology development team to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows. • Work with teams to enable deployment of new flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as SERDES, etc) and integration. • Document on new flows and processes for AMS DV. • Apply wide range of Digital and/or AMS DV skills to help and support AMS IP or Chip DV Teams to establish or enhance new or existing DV capabilities, including but not limited to developing scalable and portable Test bench, test cases, drivers, checkers, assertions and reference models, and running RTL and Gate Level simulations and reaching all coverage closures. • Contribute to continuous improving on AMS DV process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification, and post-Silicon testing teams to address new needs or requirement on DV Support. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA

• Work with the architecture team in the early stage of the project to derive various architecture and micro-architecture proposals. • Work with the performance architect to create performance models for various functional blocks of a microprocessor, memory subsystem and the whole core. • Work with design teams to analyze performance corner cases and provide feedback to the architecture team.

• Lead the DV effort of a high-end CPU project. • Manage, coach and guide DV engineers. Follow up status and keep up the schedule. • Architect and implement top-module testbenches and their components using UVM-based methods. • Lead the effort of building in-house BFMs to facilitate co-sim based module level verification. • Architect and implement formal verification based module level testbench. • Work with the design team to create testplans. Implement checkers/assertions/coverage check points. • Work with validation folks to improve design visibility

Work in Analog/Mixed-Signal Modeling and Verification Methodology Development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows, and work hands-on with AMS IP Teams for AMS Behavioral Modeling flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with AMS IP teams including digital design, analog design, analog behavioral modeling and design verification members, apply and advance existing and evolving AMS Behavioral Modeling methodologies and processes, and contribute to establish and maintain Modeling Platform to ensure High Quality and High Efficiency of Pre-Si AMS Modeling, Validation and Verification delivery towards high quality silicon products. • Work in methodology development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows. • Work with teams to enable deployment of new AMS Behavioral Modeling flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as RF, etc) and integration. • Document on new flows and processes for AMS Behavioral Modeling. • Apply wide range of AMS Behavioral Modeling skills to help and support AMS IP or Chip Teams to establish or enhance new or existing Modeling capabilities, including but not limited to Model Development, Model Validation to ensure Consistency of Behavior with Original Circuit, Integration of Models into various Verification Environment, fixing Modeling issues found in simulation, etc. • Contribute to continuous improving on AMS Behavioral Modeling process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification teams to address new needs or requirement on AMS Behavioral Modeling. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA

• Work with the architecture/micro-architecture/design teams to do white box testing. • Create testplans based on the micro-architecture document with the design team. • Build, maintain and upgrade testbenches and their components using UVM-based methods. • Build custom BFMs for co-sim based module level verification. • Add assertions and checkers to facilitate verification. • Work with the design team to do module level formal verification. • Create controlled random testcases. Pre-debug and provide debug reports. • Check functional coverage and code coverage.

1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: * Scan chain insertion & ATPG pattern generation * Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) * Diagnosis to help manufacture process improvement 2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: * PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation * Develop & integrate DFT-related RTL design modules to test chip

1. 系統應用電源需求與控制架構分析 2. 電源管理晶片規格制定與驗證 3. 類比電路開發與驗證 4. 驗證電路板設計 5. 自動化測試開發

Do you want to be part of a smart and passionate team of researchers, advancing artificial intelligence to the next level of end-user experience in their daily lives? MediaTek is seeking driven and brilliant young students to join our efforts by providing Internship placements. We are currently working to expand the frontiers of Deep Learning frameworks for Computer Vision and Natural Language Processing and we hope you can join us! The ideal candidate is open-minded, passionate about learning theory, and looks forward to both practical and challenging problems. • You will be working towards or recently have completed a PhD in a quantitative field such as Computer Science, Mathematics, Physics or Engineering. • You have a good knowledge of the foundations of Deep Learning and Neural Networks, including some experience with Machine Learning frameworks (Tensorflow, PyTorch, JAX) • You are a proficient scientific communicator. You are committed to your goals and working in a team. • You are eager to tackle the state of the art problems in the field. We want your ideas to shine! As a Deep Learning Researcher in our team, you will collaborate with our Researchers and with worldwide colleagues, stay up and above the state of the art, initiate with novel ideas, and develop them into algorithms and applications that make the real difference in everyday devices. You will also push your contribution by publishing at top-tier conferences, such as NeurIPS, ICML, ICLR, CVPR, ACL, ICRA, ACM.