交大專區

• Lead the DV effort of a high-end CPU project. • Manage, coach and guide DV engineers. Follow up status and keep up the schedule. • Architect and implement top-module testbenches and their components using UVM-based methods. • Lead the effort of building in-house BFMs to facilitate co-sim based module level verification. • Architect and implement formal verification based module level testbench. • Work with the design team to create testplans. Implement checkers/assertions/coverage check points. • Work with validation folks to improve design visibility

Work in Analog/Mixed-Signal Modeling and Verification Methodology Development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows, and work hands-on with AMS IP Teams for AMS Behavioral Modeling flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with AMS IP teams including digital design, analog design, analog behavioral modeling and design verification members, apply and advance existing and evolving AMS Behavioral Modeling methodologies and processes, and contribute to establish and maintain Modeling Platform to ensure High Quality and High Efficiency of Pre-Si AMS Modeling, Validation and Verification delivery towards high quality silicon products. • Work in methodology development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows. • Work with teams to enable deployment of new AMS Behavioral Modeling flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as RF, etc) and integration. • Document on new flows and processes for AMS Behavioral Modeling. • Apply wide range of AMS Behavioral Modeling skills to help and support AMS IP or Chip Teams to establish or enhance new or existing Modeling capabilities, including but not limited to Model Development, Model Validation to ensure Consistency of Behavior with Original Circuit, Integration of Models into various Verification Environment, fixing Modeling issues found in simulation, etc. • Contribute to continuous improving on AMS Behavioral Modeling process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification teams to address new needs or requirement on AMS Behavioral Modeling. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA

• Work with the architecture/micro-architecture/design teams to do white box testing. • Create testplans based on the micro-architecture document with the design team. • Build, maintain and upgrade testbenches and their components using UVM-based methods. • Build custom BFMs for co-sim based module level verification. • Add assertions and checkers to facilitate verification. • Work with the design team to do module level formal verification. • Create controlled random testcases. Pre-debug and provide debug reports. • Check functional coverage and code coverage.

1. 系統應用電源需求與控制架構分析 2. 電源管理晶片規格制定與驗證 3. 類比電路開發與驗證 4. 驗證電路板設計 5. 自動化測試開發

1. 平台電源管理系統架構設計與規格定義, 包含功耗/溫度/性能等系統分析. 2. 系統應用詳細電源需求與控制架構之分析與優化 3. 電源管理芯片規格制定與新技術之開發.

1. 電源管理晶片架構與系統設計(手機/車用) 2. 低功耗設計技術開發 3. 混合訊號數位 IP 設計: voltage regulator, ADC, system clocking and start-up, TOP infra/bus, peripheral designs 4. 電源管理晶片整合: front-end and back-end integration

1. WiFi/BT/GPS/FM connectivity IC驗證及系統應用 2. PMIC or PCIe 系統設計及驗證 3. Connectivity 系統性能優化及驗證 4. Connectivity參考電路設計及驗證 5. 協助客戶量產過程時提供技術支援

• Develop power and thermal management software and firmware for Windows on ARM system. • Optimize, benchmark and profile power and thermal for Windows on ARM platforms. • Analyze power and thermal related issues for Windows on ARM system.

1. 新產品開發討論 2. 電源管理IC及電源管理單元晶片整合 3. 與設計/生產/品保/軟體部門溝通協調 4. 晶片開發滿足智慧手機, IOT, 車用, 以及ASIC的需求

1. Develop systematic algorithms to alleviate design challenges, including implementation, process what-if assessment, system performance evaluation, in advanced nodes or package 2. Closely work with foundry and EDA vendors to define innovative HPC, Chiplet design methodologies 3. Explore new EDA features and define improvement direction from MTK product requirements

1.Smartphone SLT軟體整合(C/Android) 2.Smartphone SLT量產測試自動化流程改善

1. 數位晶片設計流程與整合 2. 熟悉低功耗的設計流程(和架構)

於IC開發前/中/後期，開發IP及System level model。

1. FR-1 平台天線解決方案開發與驗證 2. 使用EM模擬軟體進行天線解決方案性能評估 3. 與跨部門團隊合作開發新MTK平台天線解決方案

1. 規劃量產測試以及量產functin pattern porting 2. 測試以及驗證IC功能，性能，以及功耗等等相關測試 3. 分析測試資料以及釐清相關測試的問題，並分析良率問題以及良率改善建議 4. AVS low power的設計

聯發科技以先進多媒體技術聞名，數位視訊解碼更為多媒體技術中之重要一環，如果您對Multi-format Video decoder架構設計 / RTL implementation / 整合驗證有興趣，聯發科技誠摯邀請您，與全球最頂尖的菁英一同合作，彼此激盪最新的創意與解法，共同挑戰每一個不可能。

1.Propose design verification plan and do the execution based on IP and system HW architecture/application 2.Develop design verification environment 3.Develop required verification methodology and adopt into project

1. AI ISP 硬體架構設計 2. 系統power 與 bandwidth 設計 3. 相機規格制訂 4. ISP 硬體系統規格驗證規劃 5. 車用安全規劃

1. 從事實體設計化，設計方法開發及簽核工作 2. 執行布局，時序規劃，擺置及繞線，確保時序收斂及實體驗證。 3. 需參與團隊, 合作完成專案。 4. 須具備程式技巧以完成工作。 5. 使用到的工具有: ICC2, Innovus, Formality/LEC, PrimeTime, Calibre 等等。

無線通訊設計驗證 包含 Test plan 規劃, Bench, VIP 建立, test case 撰寫, 完成coverage等相關驗証工作